ch7019 Chrontel, ch7019 Datasheet - Page 8

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ch7019

Manufacturer Part Number
ch7019
Description
Ch7019 Tv Encoder / Lvds Transmitter
Manufacturer
Chrontel
Datasheet

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CHRONTEL
C. 24-bit Ganged Data – Dual-edge Transfer
D. 24-bit Ganged Data – Single-edge Transfer
X C L K x
X C L K x *
D E x
H x
V x
8
X C L K x
X C L K x *
D E x
H x
V x
D 1 [ 1 1 : 0 ]
D 2 [ 1 1 : 0 ]
X C L K x
X C L K x *
D x [ 1 1 : 0 ]
D E x
H x
V x
D 1 [ 1 1 : 0 ]
D 2 [ 1 1 : 0 ]
Multiplexed data - two 24-bit words per pixel from both D1[11:0] and D2[11:0]
Clock frequency equals 1/2X pixel rate with 24-bit data transfer at both rising and falling clock edges.
Maximum pixel rate is 330M pixels per second with a 165 MHz pixel clock.
No Simultaneous TV and panel display.
Non-multiplexed data - one 24-bit word per pixel from both D1[11:0] and D2[11:0].
Clock frequency equals 1X pixel rate with 24-bit data transfer at either rising or falling edge of clock
(programmable via serial port).
Maximum pixel rate is 330M pixels per second with a 330 MHz pixel clock.
No simultaneous TV and panel display.
Figure 5: Interface Timing for 24-bit Multiplexed Data – Dual-edge Transfer
Figure 6: Interface Timing for Non-multiplexed Data – Single-edge Transfer
Figure 4: Interface Timing for Multiplexed Data – Single-edge Transfer
t
t
t
S
S
S
> = 1 V G A L i n e
> = 1 V G A L i n e
> = 1 V G A L i n e
6 4 P - O U T
6 4 P - O U T
6 4 P - O U T
t
t
t
H
H
H
S A V
S A V
S A V
201-0000-048
t
t
S
S
t
S
t
t
H
H
t
H
Rev. 2.4, 12/18/2006
CH7019B

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