s71pl129ja0 Meet Spansion Inc., s71pl129ja0 Datasheet - Page 87

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s71pl129ja0

Manufacturer Part Number
s71pl129ja0
Description
Stacked Multi-chip Product Mcp Flash Memory And Psram 128 Megabit 8m X 16-bit Cmos 3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory With 64/32/16 Megabit 4m/2m/1m X 16-bit Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
Notes:
1. Stresses greater than listed under
2. All voltages are reference to GND.
3. I
4. I
5. AC measurements are assumed t
6. Parameters t
7. Data cannot be retained at deep power-down stand-by mode.
8. If OE# is high during the write cycle, the outputs will remain at high impedance.
9. During the output state of I/O signals, input signals of reverse polarity must not be applied.
10. If CE1# or LB#/UB# goes LOW coincident with or after WE# goes LOW, the outputs will remain at high impedance.
11. If CE1# or LB#/UB# goes HIGH coincident with or before WE# goes HIGH, the outputs will remain at high impedance.
Ocotober 16, 2004 pSRAM_Type06_14_A1
reference levels.
DDO
DDO
Address
Address
depends on the cycle time.
depends on output loading. Specified values are defined with the output open condition.
Provisions of Address Skew
CE1#
WE#
CE1#
WE#
OD
Read
In case multiple invalid address cycles shorter than t
in an active status, at least one valid address cycle over t
ing 10µs.
Write
In case multiple invalid address cycles shorter than t
in an active status, at least one valid address cycle over t
ing 10 µs.
, t
ODO
, t
BD
and t
A d v a n c e
OD
R
W define the time at which the output goes the open condition and are not output voltage
, t
"Absolute Maximum
F
= 5 ns.
I n f o r m a t i o n
Figure 31. Write
Figure 30. Read
pSRAM Type 6
Ratings" section may cause permanent damage to the device.
over 10 µ s
t
t
t
WC
RC
RC
WC
WP
min
min
min
min. sustain over 10 µs
min. sustain over 10 µs
WC
RC
min. is required dur-
min. is required dur-
87

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