s71pl129ja0 Meet Spansion Inc., s71pl129ja0 Datasheet - Page 36

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s71pl129ja0

Manufacturer Part Number
s71pl129ja0
Description
Stacked Multi-chip Product Mcp Flash Memory And Psram 128 Megabit 8m X 16-bit Cmos 3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory With 64/32/16 Megabit 4m/2m/1m X 16-bit Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
36
Password and Password Mode Locking Bit
64-bit Password
Write Protect (WP#)
In order to select the P assword sector protection scheme, the customer must first
program the password. The password may be correlated to the unique Electronic
Serial Number (ESN) of the particular flash device. Each ESN is different for every
flash device; therefore each password should be different for every flash device.
While programming in the password region, the customer may perform Password
Verify operations.
Once the desired password is programmed in, the customer must then set the
P assword Mode Locking Bit. This operation achieves two objectives:
P ermanently sets the device to operate using the P assword Protection Mode. It is
not possible to reverse this function.
Disables all further commands to the password region. All program, and read op-
erations are ignored.
Both of these objectives are important, and if not carefully considered, may lead
to unrecoverable errors. The user must be sure that the Password Protection
method is desired when setting the Password Mode Locking Bit. More importantly,
the user must be sure that the password is correct when the Password Mode
Locking Bit is set. Due to the fact that read operations are disabled, there is no
means to verify what the password is afterwards. If the password is lost after set-
ting the Password Mode Locking Bit, there is not any way to clear the PPB Lock bit.
The P assword Mode Locking Bit, once set, prevents reading the 64-bit password
on the DQ bus and further password programming. The P assword Mode Locking
Bit is not erasable. Once Password Mode Locking Bit is programmed, the P ersis-
tent Sector Protection Locking Bit is disabled from programming, guaranteeing
that no changes to the protection scheme are allowed.
The 64-bit Password is located in its own memory space and is accessible through
the use of the P assword Program and Verify commands (see “Password Verify
Command”). The password function works in conjunction with the Password
Mode Locking Bit, which when set, prevents the Password Verify command from
reading the contents of the password on the pins of the device.
The Write Protect feature provides a hardware method of protecting the upper
two and lower two sectors(PL127J: 0, 1, 268, and 269, PL064J: 0, 1, 140, and
141, PL032J: 0, 1, 76, and 77, PL129J: SA1-133, SA1-134,SA2-0 and SA2-1)
without using V
viously discussed method,
If the system asserts V
erase functions in the two outermost 4 Kword sectors on both ends of the flash
array independent of whether it was previously protected or unprotected.
If the system asserts V
and lower two sectors to whether they were last set to be protected or unpro-
tected. That is, sector protection or unprotection for these sectors depends on
whether they were last protected or unprotected using the method described in
“High Voltage Sector Protection”
Note that the WP#/ACC pin must not be left floating or unconnected; inconsistent
behavior of the device may result.
ID
. This function is provided by the WP# pin and overrides the pre-
IH
IL
on the WP#/ACC pin, the device disables program and
on the WP#/ACC pin, the device reverts the upper two
“High Voltage Sector Protection”
A d v a n c e
S29PL129J for MCP
on page 37.
I n f o r m a t i o n
on page 37.
S29PL129J_MCP_00_A0 June 4, 2004

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