s71pl129ja0 Meet Spansion Inc., s71pl129ja0 Datasheet - Page 21

no-image

s71pl129ja0

Manufacturer Part Number
s71pl129ja0
Description
Stacked Multi-chip Product Mcp Flash Memory And Psram 128 Megabit 8m X 16-bit Cmos 3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory With 64/32/16 Megabit 4m/2m/1m X 16-bit Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
June 4, 2004 S29PL129J_MCP_00_A0
Writing Commands/Command Sequences
Standby Mode
Bank 2A
Bank 2B
T o write a command or command sequence (which includes programming data
to the device and erasing sectors of memory), the system must drive WE# and
CE1# or CE#2 to V
The device features an Unlock Bypass mode to facilitate faster programming.
Once a bank enters the Unlock Bypass mode, only two write cycles are required
to program a word, instead of four.
46 has details on programming data to the device using both standard and Unlock
Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 4
dress” is the set of address bits required to uniquely select a bank. Similarly, a
“sector address” refers to the address bits required to uniquely select a sector.
“Command Definitions”
chip, or suspending/resuming the erase operation.
I
the write mode. See the timing specification tables and timing diagrams in
set”
Accelerated Program Operation
The device offers accelerated program operations through the ACC function. This
function is primarily intended to allow faster manufacturing throughput at the
factory.
If the system asserts V
mentioned Unlock Bypass mode, temporarily unprotects any protected sectors,
and uses the higher voltage on the pin to reduce the time required for program
operations. The system would use a two-cycle program command sequence as
required by the Unlock Bypass mode. Removing V
turns the device to normal operation. Note that V
WP#/ACC for operations other than accelerated programming, or device damage
may result. In addition, the WP#/ACC pin should be raised to V
use. That is, the WP#/ ACC pin should not be left floating or unconnected; incon-
sistent behavior of the device may result.
Autoselect Functions
If the system writes the autoselect command sequence, the device enters the au-
toselect mode. The system can then read autoselect codes from the internal
register (which is separate from the memory array) on DQ15–DQ0. Standard
read cycle timings apply in this mode. See
page 29 and
When the system is not reading or writing to the device, it can place the device
in the standby mode. In this mode, current consumption is greatly reduced, and
the outputs are placed in the high impedance state, independent of the OE#
input.
CC2
for write operations.
in the DC Characteristics table represents the active current specification for
indicates the set of address space that each sector occupies. A “bank ad-
A d v a n c e
“Autoselect Command Sequence”
IL
, and OE# to V
HH
on page 45 has details on erasing a sector or the entire
1
1
on this pin, the device automatically enters the afore-
I n f o r m a t i o n
S29PL129J for MCP
“Word Program Command Sequence”
IH
.
“Secured Silicon Sector Addresses”
on page 46 for more information.
HH
HH
from the WP#/ACC pin re-
0
0
must not be asserted on
CC
when not in
on page
“Re-
00, 01, 10
on
11
21

Related parts for s71pl129ja0