s71pl129ja0 Meet Spansion Inc., s71pl129ja0 Datasheet - Page 129

• Manufacturer Part Number: s71pl129ja0
• Description: Stacked Multi-chip Product Mcp Flash Memory And Psram 128 Megabit 8m X 16-bit Cmos 3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory With 64/32/16 Megabit 4m/2m/1m X 16-bit Pseudo-static Ram
• Manufacturer: Meet Spansion Inc.

Notes:
1. A write occurs during the overlap (t
2. t
3. t
4. t
June 25, 2004 pSRAM_Type02_15A1
with asserting UB# or LB# for single byte operation or simultaneously asserting UB# and LB# for double byte operation. A
write ends at the earliest transition when CS1# goes high and WE# goes high. The t
write to the end of write.
high.
CW
AS
WR
is measured from the address valid to the beginning of write.
is measured from the CS1# going low to the end of write.
is measured from the end of write to the address change. t
CS1#
CS2
Address
UB#, LB#
WE#
Data in
Data out
Figure 52. Timing Waveform of Write Cycle(4) (UB#, LB# Controlled)
A d v a n c e
WP
) of low CS1# and low WE#. A write begins when CS1# goes low and WE# goes low
t
AS
I n f o r m a t i o n
Type 2 pSRAM
High-Z
t
t
AW
WR
CW
t
t
WC
WP
t
BW
is applied in case a write ends with CS1# or WE# going
t
DW
Data Valid
t
WR
WP
t
DH
is measured from the beginning of
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