msm7730 Oki Semiconductor, msm7730 Datasheet - Page 8

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msm7730

Manufacturer Part Number
msm7730
Description
Wireless Lan Baseband Controller
Manufacturer
Oki Semiconductor
Datasheet

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MODEM Interface
The MSM7730 provides Frequency Hopping Physical Layer Convergence Protocol (FH PLCP) framing
and the FH modem as defined by the IEEE 802.11 specification. The radio synthesizer control pins are
used for all modem options. A diagnostic port is provided when the internal modem is used. Several
options are provided by the internal FH modem. The following table shows the pin usage for the various
modem options.
Modem Options and Pin Connections
1. All modem signals are synchronized to RCK.
Modulator
The MSM7730 provides an integrated 24-MHz internal digital IF modulator. The modulator generates
ordinary Frequency Shift Keying (CP-FSK) and relies on radio filtering to shape this to Gaussian Fre-
quency Shift Keying (GFSK). Since the radio requires a SAW filter to achieve out-of-band transmit
requirements, this filter can also be used to provide the required in-band frequency response. This pro-
vides for more efficient power consumption because extra digital filtering is not required in the modula-
tor. The modulator is shown in Figure 4.
The modulator supports two modes of modulator operation:
The modulation scheme for 1-Mbps operation is Gaussian Frequency Shift Keying (GFSK). The modula-
tion scheme for 2-Mbps operation is 4-level GFSK.
Deviations can be set independently for both modes. Modes switch phase continuously in a single clock
cycle.
where N = 0.63.
6
MSEL
IFD[5:0]
RXD
• 1-Mbps, 2-ary CP-FSK
• 2-Mbps, 4-ary CP-FSK
• 1-Mb deviation: 1MDEV = N x 32
• 2-Mb deviation: 2MDEV = N x 3 x 32
MSM7730
Modem Interface
PHY
Oki Semiconductor
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
TxClkEn
ModeEn
Mode
TxData
1
IFD[5:0] to TXIF DAC
IFD[4] carries SLICE on RX
Baseband RX data from radio
FH Mbps (Low Cost)
Processing
Input
Figure 4. Modulator Block Diagram
6
/4096 Hz
[1]
6
/4096 Hz
State Machine
2
IFD[5:0] to TXIF
DAC and IFD[3:0] from RXADC
Recovered data (Debug out)
Modulator
FH 1/2 Mbps (Normal ADC)
Processing
Ramp
3
IFD[5:0] to TXIF DAC (also used for Delta ADC)
Input from Delta ADC comparator
IFData
FH 1/2 Mbps (Delta ADC)
RADIO

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