msm7730 Oki Semiconductor, msm7730 Datasheet - Page 7

• Manufacturer Part Number: msm7730
• Description: Wireless Lan Baseband Controller
• Manufacturer: Oki Semiconductor

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Radio Interface
The radio interface supports simple, flexible control of the radio and its synthesizer. The control signal
timing is programmable by the processor. Figure 3 shows the connection to a typical radio architecture.
The MSM7730 uses the RXC1 and TXC[1:0] pins to control radio timing. The delay between these signals
is programmable to support different radio designs.
The MSM7730 provides a 24-bit serial programming interface that supports the Seimens PMB2306T and
Philips UMA1020N synthesizers. The synthesizer interface is controlled through the use of an on-chip
synthesizer register.
The MSM7730 provides a hardware controlled serial DAC interface that is not accessible through any
MSM7730 registers. Because the synthesizer and EEPROM share the same clock and data lines, software
is responsible for ensuring that the PHY module is disabled when either of these modules is accessed.
At the start of each transmit packet, one of the four power levels is selected from the on-chip power con-
trol register according to the transmit power level requested by the control word of that packet. During a
receive operation, the serial DAC is used together with an external comparator for RSSI thresholds and
successive approximation measurement. The RSSIA threshold is loaded whenever the receiver is first
powered on. Once the RSSIA threshold is exceeded, the demodulator is accessed and the RSSIB, RSSIC,
and RSSID thresholds are loaded sequentially during each antenna scan. Once antenna scanning has
completed, a successive approximation is started.
LNA
PA
Radio
1LO
Figure 3. Typical FH Radio Interface
2LO
Disc
+
-
DAC
DAC
CSN
D
RADPWR
RXC1
SLICE
RXD
RSSITH
DACEN
SYNCLK
SYNDAT
SYNLEN
LKDET
IFD[5:0]
TXC1
TXC2
ANT
Oki Semiconductor
MSM7730
MSM7730
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