msm7730 Oki Semiconductor, msm7730 Datasheet - Page 17

• Manufacturer Part Number: msm7730
• Description: Wireless Lan Baseband Controller
• Manufacturer: Oki Semiconductor

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MSM7730 Register Map (Continued)
0x1E
0x20
0x22
0x26
0x28
0x2A
0x2C
0x2E
0x30
0x32
0x34
0x36
0x40
0x44
0x46
0x48
0x4A
0x4C
0x4E
Offset
Byte
Modem
MAC Controll
Register
Group
16
16
16
16
16
16
16
16
16
16
16
Width
(bits)
16
16
16
16
16
16
16
16
16
RSSIAB
PHY Control (PHY_CTL)
User I/O port (internal)
User I/O Port (external)
RSSICD
Modem Control 0
Modem Control 1
Demodulator Control 0
Demodulator Control 1
Version Number
Buffer Control
Rx In Pointer
Rx Out Pointer
Power Down Control
MAC Control
Tx Pointer
Interrupt Enable
Interrupt Acknowledge
Interrupt Status
Sequencer Status
Register Name
Contains two 6-bit fields: RSSIA and RSSIB. RSSIA is set to correspond to -
65 dB T the radio input. RSSIB is set to correspond to -85 dB T the radio input.
Contains PHY transmit, receive, and Clear Channel Assessment (CCA) status.
The internal port is selected when the MSEL field in the PHY Configuration
registers equals a value between 0 and 3. The bit descriptions are different
depending on whether this registers is configured for internal or external use
(see next register entry). In the internal mode, the two 6-bit fields configure
each bit of the user I/O port as input or output, and whether values can be read
from or written to this register.
The external port is selected when the MSEL field in the PHY Configuration
registers equals a value between 4 and 7. The bit descriptions are different
depending on whether this registers is configured for internal or external use
(see above register entry). One 6-bit field contains the number of clock
periods from TXDRDY or RXDRDY assertion. The other 6-bit field contains
the number of RXCLK periods from the length field to the start of the PDU
packet.
Contains two 6-bit fields: RSSIC and RSSID. RSSIC corresponds to -80 dBm
at the radio input. RSSID corresponds to -75 dBm at the radio input.
Contains two 6-bit fields that set the 1- and 2-Mbps inner symbol modulation
index.
Contains settings for parameters such as integration time for slow carrier
tracking group, antenna scan delay, ramp-up, and ramp-down sequences.
Contains demodulator control word settings.
Contains noise threshold and jamming counter information.
Contains the MSM7730 MAC version number (0x83).
Contains the size and address of the receive circular buffer in shared memory.
Contains a word offset from the start of the receive circular buffer in shared
memory. The offset indicates the location of the address where the next word
to be received will be stored.
Contains a word offset from the start of the receive circular buffer in shared
memory. The offset indicates the first word in the buffer that is available for
use by MAC hardware.
Contains Hibernate mode request and wakeup information.
Contains filtering mode parameters as well as transmit, receive, PHY, and
modem enable information.
Contains the word offset from the start of the transmit pointer table.
Enables interrupts based on the event type.
This register has the exact same format as the Interrupt Enable register.
Setting a bit in this registers clears the corresponding bit in the Interrupt
Enable register.
This register has the exact same format as the Interrupt Enable register but is
read-only. This register is written by hardware.
Indicates current sequencer activity. Most bits are written by hardware and
are read-only. However, a global clear bit allows for all of the read-only bits to
be cleared at the same time.
Description
Oki Semiconductor
MSM7730
15