a2f500m3b-1csh484 Actel Corporation, a2f500m3b-1csh484 Datasheet - Page 83

• Manufacturer Part Number: a2f500m3b-1csh484
• Description: Actel
• Manufacturer: Actel Corporation

Table 2-84 • RAM4K9
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
F
Note:
AS
AH
ENS
ENH
BKS
BKH
DS
DH
CKQ1
CKQ2
C2CWWH
C2CRWH
C2CWRH
RSTBQ
REMRSTB
RECRSTB
MPWRSTB
CYC
MAX
For the derating values at specific junction temperature and voltage supply levels, refer to
page 2-9
Worst Commercial-Case Conditions: T
Timing Characteristics
Address setup time
Address hold time
REN_B, WEN_B setup time
REN_B, WEN_B hold time
BLK_B setup time
BLK_B hold time
Input data (DI) setup time
Input data (DI) hold time
Clock High to new data valid on DO (output retained, WMODE = 0)
Clock High to new data valid on DO (flow-through, WMODE = 1)
Clock High to new data valid on DO (pipelined)
Address collision clk-to-clk delay for reliable write after write on same address—
applicable to rising edge
Address collision clk-to-clk delay for reliable read access after write on same address—
applicable to opening edge
Address collision clk-to-clk delay for reliable write access after read on same address—
applicable to opening edge
RESET_B Low to data out Low on DO (flow-through)
RESET_B Low to Data Out Low on DO (pipelined)
RESET_B removal
RESET_B recovery
RESET_B minimum pulse width
Clock cycle time
Maximum clock frequency
for derating values.
Description
J
= 85°C, Worst-Case VCC = 1.425 V
R e v i s i o n 3
Actel SmartFusion Intelligent Mixed Signal FPGAs
0.25
0.00
0.15
0.10
0.24
0.02
0.19
0.00
1.81
2.39
0.91
0.30
0.45
0.49
0.94
0.94
0.29
1.52
0.22
3.28
Table 2-7 on
305
–1
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2- 71