tmp89fm42l TOSHIBA Semiconductor CORPORATION, tmp89fm42l Datasheet - Page 25

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tmp89fm42l

Manufacturer Part Number
tmp89fm42l
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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RB000
System control status register 4
Flash memory control register 1
(0x0FDF)
(0x0FD0)
SYSSR4
FLSCR1
2.2.1.2
Note:Bits 7 to 3 of SYSSR4 are read as "0".
Note:The flash memory control register 1 has a double-buffer structure comprised of the register FLSCR1 and a shift
TRANS_RAM:
register. Writing "0xD5" to the register FLSCR2 allows a register setting to be reflected and take effect in the shift
Example: Program transfer (Transfer the program saved in the data area to the RAM.)
RAREAS
RVCTRS
Read/Write
0x17FF in the code area and to 0x1000 to 0x17FF in the data area. Flash memory can be easily programmed
by using the API (Application Programming Interface) contained in the BOOTROM.
Read/Write
BAREA
Bit Symbol
Bit Symbol
After reset
Note 1: When the BOOTROM is not mapped in the code area, an instruction is fetched from the Flash or an SWI in-
Note 2: Only the first 2 Kbytes of the BOOTROM are mapped in the memory map, except in the serial PROM mode.
After reset
The BOOTROM is not mapped in the code area or the data area after reset release.
BOOTROM
Setting FLSCR1<BAREA> to "1" and writing 0xD5 to FLSCR2 maps the BOOTROM to 0x1000 to
LD
LD
LD
LD
LD
INC
INC
DEC
J
struction is fetched, depending on the capacity of the internal Flash.
Status of mapping of the RAM in the
code area
Status of mapping of the vector ad-
dress in the area
Specifies mapping of the BOOT-
ROM in the code and data areas
R
7
0
HL, TRANSFER_START_ADDRESS
DE, PROGRAM_START_ADDRESS
BC, BYTE_OF_PROGRAM
A, (DE)
(HL), A
HL
DE
BC
F, TRANS_RAM
7
0
-
(FLSMD)
R/W
R
6
0
6
1
-
R
5
0
5
0
-
0 :
1 :
0 :
1 :
Page 11
0 :
1 :
The enabled SYSCR3<RAREA> data is "0".
The enabled SYSCR3<RAREA> data is "1".
The enabled SYSCR3<RVCTR> data is "0".
The enabled SYSCR3<RVCTR> data is "1".
The BOOTROM is not mapped to 0x1000 to 0x17FF in the code area and
to 0x1000 to 0x17FF in the data area.
The BOOTROM is mapped to 0x1000 to 0x17FF in the code area and to
0x1000 to 0x17FF in the data area.
BAREA
R/W
;Destination RAM address
;Source ROM address
;Number of bytes of the program to be executed -1
;Reading the program to be transferred
;Writing the program to be transferred
;Destination address increment
;Source address increment
;Have all the programs been transferred?
R
4
0
4
0
-
R
0
3
3
0
-
(FAREA)
R/W
RVCTRS
R
2
0
2
0
RAREAS
R
1
0
1
0
TMP89FM42L
(ROMSEL)
R/W
(RSTDIS)
R
0
0
0
0

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