tmp89fm42l TOSHIBA Semiconductor CORPORATION, tmp89fm42l Datasheet - Page 212

• Manufacturer Part Number: tmp89fm42l
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

14.4
Functions
RA005
regardless of the T00MOD<DBE1> setting.
(Example) Operate TC00 and TC01 in the 16-bit timer mode with the operation clock of fcgck/2 [Hz] and generate inter-
When a read instruction is executed on T01+00REG, the last value written into T01+00REG is read out,
interval may be longer than the selected time. If the value set to T01+00REG is equal to the up
counter value, the match detection is executed immediately after data is written into T01+00REG.
Therefore, the interrupt request interval may not be an integral multiple of the source clock. If
these are problems, enable the double buffer.
stopped, the set value is immediately stored in T01+00REG.
rupts at 192 μs intervals (fcgck = 4 MHz)
When write instructions are executed on T00REG and T01REG in this order while the timer is
LD
DI
SET
EI
LD
LD
LD
LD
(POFFCR0),0x10
(EIRH).4
(T01MOD),0xF0
(T00REG),0x80
(T01REG),0x01
(T001CR),0x06
Page 198
; Sets TC001EN to "1"
; Sets the interrupt master enable flag to "disable"
; Sets the INTTC00 interrupt enable register to "1"
; Sets the interrupt master enable flag to "enable"
; Selects the 16-bit timer mode and fcgck/2
; Sets the timer register (192μs / (2/fcgck) = 0x180)
; Sets the timer register
; Starts TC00 and TC001 (16-bit mode)
TMP89FM42L