lh28f016sc-l Sharp Microelectronics of the Americas, lh28f016sc-l Datasheet - Page 29

• Manufacturer Part Number: lh28f016sc-l
• Description: M-bit Smartvoltage Flash Memories
• Manufacturer: Sharp Microelectronics of the Americas

6.2.3 DC CHARACTERISTICS (contd.)
NOTES :
1. All currents are in RMS unless otherwise noted. Typical
2. I
3. Includes RY/BY#.
4. Block erases, byte writes, and lock-bit configurations are
5. Automatic Power Saving (APS) reduces typical I
SYMBOL
V
V
V
V
V
V
V
V
V
V
V
IL
IH
OL
OH1
OH2
PPLK
PPH1
PPH2
PPH3
LKO
HH
values at nominal V
currents are valid for all product versions (packages and
speeds).
selected. If reading or byte writing in erase suspend
mode, the device’s current draw is the sum of I
I
inhibited when V
range between V
V
and V
1 mA at 5 V V
static operation.
CCES
CCWS
PPH1
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
(TTL)
Output High Voltage
(CMOS)
V
Normal Operations
V
Byte Write, Block Erase
or Lock-Bit Operations
V
Byte Write, Block Erase
or Lock-Bit Operations
V
Byte Write, Block Erase
or Lock-Bit Operations
V
RP# Unlock Voltage
PPH3
and I
PP
PP
PP
PP
CC
(max.) and V
and I
Lockout Voltage during
Voltage during
Voltage during
Voltage during
Lockout Voltage
PARAMETER
CCR
(min.), and above V
CCES
CC
or I
PP
PPLK
and 3 mA at 2.7 V and 3.3 V V
CCW
are specified with the device de-
≤ V
CC
PPH2
(max.) and V
, respectively.
voltage and T
PPLK
(min.), between V
, and not guaranteed in the
PPH3
NOTE
3, 7
3, 7
3, 7
4, 7
8, 9
PPH1
7
7
(max.).
A
= +25˚C. These
V
(min.), between
CC
MIN.
– 0.5
– 0.4
0.85
V
V
2.0
2.4
2.0
—
—
—
—
CC
CC
= 2.7 to 3.6 V V
PPH2
CCWS
MAX.
(max.)
CCR
+0.5
V
0.8
0.4
1.5
—
—
—
—
CC
CC
or
to
in
- 29 -
MIN.
– 0.5
– 0.4
CC
0.85
11.4
11.4
V
V
2.0
2.4
3.0
4.5
2.0
CC
CC
= 3.3±0.3 V V
6. CMOS inputs are either V
7. Sampled, not 100% tested.
8. Master lock-bit set operations are inhibited when RP# =
9. RP# connection to a V
MAX.
+0.5
12.6
12.6
V
inputs are either V
V
when the master lock-bit is set and RP# = V
erases and byte writes are inhibited when the
corresponding block lock-bit is set and RP# = V
erase, byte write, and lock-bit configuration operations
are not guaranteed with V
V
maximum cumulative period of 80 hours.
0.8
0.4
1.5
3.6
5.5
CC
IH
HH
. Block lock-bit configuration operations are inhibited
and should not be attempted.
MIN.
– 0.5
– 0.4
CC
0.85
11.4
11.4
V
V
2.0
2.4
4.5
2.0
—
CC
CC
= 5.0±0.5 V
MAX.
+0.5
0.45
12.6
12.6
V
0.8
1.5
5.5
—
CC
IL
or V
UNIT
IH
LH28F016SC-L/SCH-L
V
V
V
V
V
V
V
V
V
V
V
V
CC
HH
.
CC
±0.2 V or GND±0.2 V. TTL
supply is allowed for a
V
I
I
V
I
I
V
I
V
I
Set master lock-bit
Override master and
block lock-bit
OH
OL
OL
OH
OH
OH
< 3.0 V or V
CC
CC
CC
CC
= 2.0 mA (3.3 V, 2.7 V)
= –2.0 mA (3.3 V, 2.7 V)
= 5.8 mA (5 V)
= –2.5 mA (5 V)
= –2.5 mA
= –100 µA
CONDITIONS
= V
= V
= V
= V
CC
CC
CC
CC
TEST
Min.
Min.
Min.
Min.
IH
< RP# <
IH
IH
. Block
. Block