z89136 ZiLOG Semiconductor, z89136 Datasheet - Page 42

• Manufacturer Part Number: z89136
• Description: Low-cost Dtad Controller
• Manufacturer: ZiLOG Semiconductor

Z89135/136 (ROMless)
Low-Cost DTAD Controller
WDT Time Select (D0,D1). Selects the WDT time period.
It is configured as shown in Table 8.
Notes:
TpC = XTAL clock cycle
The default on reset is 15 ms.
1-42
D1
0
0
1
1
D0
0
1
0
1
Table 8. WDT Time Select
/RESET
Select (SMR)
Internal RC OSC
WDT Select
CK Source
Stop Delay
(WDTMR)
From Stop
(WDTMR)
Recovery
Time-out of
100 ms min
2V REF .
15 ms min
25 ms min
Source
Select
5 ms min
XTAL
Mode
VDD
WDT
12 ns Glitch Filter
+
-
4 Clock
Filter
RC
OSC.
2V Operating
Voltage Det.
Time-out of
XTAL clock
1024 TpC
4096 TpC
256 TpC
512 TpC
Figure 29. Resets and WDT
M
U
X
P R E L I M I N A R Y
Clear
CLK
CK
5 ms POR
CLR
WDT During Halt (D2). This bit determines whether or not
the WDT is active during HALT Mode. A 1 indicates active
during HALT. The default is 1.
WDT During Stop (D3). This bit determines whether or
not the WDT is active during STOP Mode. Since XTAL
clock is stopped during STOP Mode, the on-board RC has
to be selected as the clock source to the POR counter. A
1 indicates active during STOP. The default is 1.
Clock Source for WDT (D4). This bit determines which
oscillator source is used to clock the internal POR and
WDT counter chain. If the bit is a 1, the internal RC oscil-
lator is bypassed and the POR and WDT clock source is
driven from the external pin, XTAL1. The default configu-
ration of this bit is 0 which selects the RC oscillator
.
18 Clock RESET
WDT/POR Counter Chain
5 ms 15 ms 25 ms 100 ms
Generator
WDT TAP SELECT
RESET
Internal
RESET
DS97TAD0300
Zilog