isp1181 NXP Semiconductors, isp1181 Datasheet - Page 32

• Manufacturer Part Number: isp1181
• Description: Isp1181 Full-speed Universal Serial Bus Interface Device
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 27:
9397 750 08938
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
DMA Counter Register: bit allocation
R/W
R/W
15
0
7
0
12.1.7 Write/Read DMA Counter
Table 26:
This command accesses the DMA Counter Register, which consists of 2 bytes. The
bit allocation is given in
DMA transfer. Reading the register returns the number of remaining bytes in the
current transfer. A bus reset will not change the programmed bit values.
The internal DMA counter is automatically reloaded from the DMA Counter Register
when DMA is re-enabled (DMAEN = 1). See
Code (Hex): F2/F3 — write/read DMA Counter Register
Transaction — write/read 2 bytes
Table 28:
Bit
3
2
1 to 0
Bit
15 to 8
7 to 0
R/W
R/W
14
0
6
0
DMA Configuration Register: bit description
DMA Counter Register: bit description
Symbol
DMAEN
-
BURSTL[1:0]
Symbol
DMACRH[7:0] DMA Counter Register (high byte)
DMACRL[7:0]
R/W
R/W
13
0
5
0
Rev. 04 — 30 October 2001
Table
Description
Writing a logic 1 enables DMA transfer, a logic 0 forces the end
of an ongoing DMA transfer and generates an EOT interrupt.
Reading this bit indicates whether DMA is enabled (0 = DMA
stopped, 1 = DMA enabled). This bit is cleared by a bus reset.
reserved
Selects the DMA burst length:
00 — single-cycle mode (1 byte)
01 — burst mode (4 bytes)
10 — burst mode (8 bytes)
11 — burst mode (16 bytes).
Bus reset value: unchanged.
Description
DMA Counter Register (low byte)
R/W
R/W
12
0
4
0
DMACRH[7:0]
DMACRL[7:0]
27. Writing to the register sets the number of bytes for a
R/W
R/W
11
0
3
0
Section 12.1.6
R/W
R/W
10
0
2
0
…continued
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Full-speed USB interface
for more details.
R/W
R/W
9
0
1
0
ISP1181
R/W
R/W
8
0
0
0
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