isp1181 NXP Semiconductors, isp1181 Datasheet - Page 20

• Manufacturer Part Number: isp1181
• Description: Isp1181 Full-speed Universal Serial Bus Interface Device
• Manufacturer: NXP Semiconductors

Philips Semiconductors
11. Suspend and resume
9397 750 08938
Product data
Fig 6. Typical suspend timing.
GOSUSP
WAKEUP
11.1 Suspend conditions
The ISP1181 detects a USB ‘suspend’ status in the following cases:
ISP1181 will remain in ‘suspend’ state for at least 5 ms, before responding to external
wake-up events such as global resume, bus traffic, wake-up on CS or WAKEUP. The
typical timing is shown in
Bus-powered devices that are suspended must not consume more than 500 A of
current. This is achieved by shutting down the power to system components or
supplying them with a reduced voltage.
ISP1181 is always in powered-off mode during ‘suspend’ state. Default, bit PWROFF
in the Hardware Configuration register is logic 1 and this value should not be changed
under any condition. This powered-off mode is explained in detail in
The steps leading up to ‘suspend’ status are as follows:
•
•
•
1. Upon detection of a ‘wake-up’ to ‘suspend’ transition ISP1181 sets bit SUSPND
2. When the firmware detects a ‘suspend’ condition it must prepare all system
3. In the interrupt service routine the firmware must check the current status of the
A J-state is present on the USB bus for 3 ms
V
SoftConnect is disabled by clearing bit SOFTCT in the Mode Register, with
external pull-ups disabled by EXTPUL = 0 in the Hardware Configuration Register.
In this situation ISP1181 is effectively disconnected from the USB bus.
in the Interrupt Register. This will generate an interrupt if bit IESUSP in the
Interrupt Enable Register is set.
components for ‘suspend’ state:
USB bus. When bit BUSTATUS in the Interrupt Register is logic 0, the USB bus
has left ‘suspend’ mode and the process must be aborted. Otherwise, the next
step can be executed.
BUS
a. All signals connected to ISP1181 must enter appropriate states to meet the
b. All input pins of ISP1181 must have a CMOS logic 0 or logic 1 level.
power consumption requirements of ‘suspend’ state.
is lost (weak pull-up/down on D and D )
Rev. 04 — 30 October 2001
suspend
>5 ms
Figure
6.
start detection of
wake-up conditions
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Full-speed USB interface
ISP1181
Section
MGS949
11.1.1.
20 of 71