isp1181 NXP Semiconductors, isp1181 Datasheet - Page 11

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isp1181

Manufacturer Part Number
isp1181
Description
Isp1181 Full-speed Universal Serial Bus Interface Device
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
8. Modes of operation
Table 3:
9. Endpoint descriptions
9397 750 08938
Product data
Mode
0
1
2
3
Bus configuration modes
BUS_CONF[1:0]
0
0
1
1
9.1 Endpoint access
0
1
0
1
The ISP1181 has four bus configuration modes, selected via pins BUS_CONF1 and
BUSCONF0:
Mode 0
Mode 1
Mode 2
Mode 3
The bus configurations for each of these modes are given in
circuits for each mode are given in
Each USB device is logically composed of several independent endpoints. An
endpoint acts as a terminus of a communication flow between the host and the
device. At design time each endpoint is assigned a unique number (endpoint
identifier, see
during enumeration), the endpoint number and the transfer direction allows each
endpoint to be uniquely referenced.
The ISP1181 has 16 endpoints: endpoint 0 (control IN and OUT) plus 14 configurable
endpoints, which can be individually defined as interrupt/bulk/isochronous, IN or OUT.
Each enabled endpoint has an associated FIFO, which can be accessed either via
the parallel I/O interface or via DMA.
Table 4
I/O mode access. Endpoints 1 to 14 also support DMA access. FIFO DMA access is
selected and enabled via bits EPIDX[3:0] and DMAEN of the DMA Configuration
Register. A detailed description of the DMA operation is given in
PIO width
D[15:0]
reserved
D[7:0]
reserved
lists the endpoint access modes and programmability. All endpoints support
16-bit I/O port shared with 16-bit DMA port
reserved
8-bit I/O port shared with 8-bit DMA port
reserved.
Table
Rev. 04 — 30 October 2001
DMAWD = 0
-
reserved
D[7:0]
reserved
4). The combination of the device address (given by the host
DMA width
DMAWD = 1
D[15:0]
reserved
-
reserved
Section
20.1.
Description
multiplexed address/data on pin AD0;
bus is shared by 16-bit I/O port and
16-bit DMA port
reserved
multiplexed address/data on pin AD0;
bus is shared by 8-bit I/O port and 8-bit
DMA port
reserved
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Full-speed USB interface
Table
Section
3. Typical interface
ISP1181
10.
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