mc68hc05jp6pe Freescale Semiconductor, Inc, mc68hc05jp6pe Datasheet - Page 36

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mc68hc05jp6pe

Manufacturer Part Number
mc68hc05jp6pe
Description
M68hc05 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Memory
2.5 Interrupt Vector Mapping
2.6 RAM
General Release Specification
36
NOTE:
The interrupt vectors are contained in the upper memory addresses
above $1FF0 as shown in
The 224 addresses from $0020 to $00FF serve as both the user RAM
and the stack RAM. The CPU uses five RAM bytes to save all CPU
register contents before processing an interrupt. During a subroutine
call, the CPU uses two bytes to store the return address. The stack
pointer decrements during pushes and increments during pulls.
Be careful when using nested subroutines or multiple interrupt levels.
The CPU may overwrite data in the RAM during a subroutine or during
the interrupt stacking operation.
Address
$1FFC
$1FFD
$1FF0
$1FF1
$1FF2
$1FF3
$1FF4
$1FF5
$1FF6
$1FF7
$1FF8
$1FF9
$1FFA
$1FFB
$1FFE
$1FFF
Memory
Figure 2-5. Vector Mapping
Figure
CTimer Interrupt Vector (MSB)
Analog Interrupt Vector (MSB)
CTimer Interrupt Vector (LSB)
Analog Interrupt Vector (LSB)
Serial Interrupt Vector (MSB)
Serial Interrupt Vector ((LSB)
Timer Interrupt Vector (MSB)
Timer Interrupt Vector (LSB)
External IRQ Vector (MSB)
External IRQ Vector (LSB)
Reset Vector (MSB)
Register Name
Reset Vector (LSB)
2-5.
SWI Vector (MSB)
SWI Vector (LSB)
MC68HC05JJ6/MC68HC05JP6
COP Register
Unused
Freescale Semiconductor
Rev. 3.2

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