mc68hc05jp6pe Freescale Semiconductor, Inc, mc68hc05jp6pe Datasheet - Page 137

• Manufacturer Part Number: mc68hc05jp6pe
• Description: M68hc05 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

General Release Specification — MC68HC05JJ6/MC68HC05JP6
9.1 Contents
9.2 Introduction
MC68HC05JJ6/MC68HC05JP6
Freescale Semiconductor
9.2
9.3
9.3.1
9.3.2
9.3.3
9.4
9.4.1
9.4.2
9.4.3
The simple synchronous serial I/O port (SIOP) subsystem is designed to
provide efficient serial communications with peripheral devices or other
MCUs. SIOP is implemented as a 3-wire master/slave system with serial
clock (SCK), serial data input (SDI), and serial data output (SDO). A
block diagram of the SIOP is shown in
The SIOP subsystem shares its input/output pins with port B. When the
SIOP is enabled (SPE bit set in the SCR), the port B data direction and
data registers are bypassed by the SIOP. The port B data direction and
data registers will remain accessible and can be altered by the
application software, but these actions will not affect the SIOP
transmitted or received data.
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Rev. 3.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137
SIOP Signal Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139
SIOP Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141
Serial Clock (SCK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139
Serial Data Input (SDI) . . . . . . . . . . . . . . . . . . . . . . . . . . .140
Serial Data Output (SDO) . . . . . . . . . . . . . . . . . . . . . . . . .140
SIOP Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . .141
SIOP Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .144
SIOP Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .145
Simple Serial Interface
Section 9. Simple Serial Interface
Figure
General Release Specification
9-1.
137