ATA6020N ATMEL Corporation, ATA6020N Datasheet - Page 42

• Manufacturer Part Number: ATA6020N
• Description: Low-current Microcontroller For Watchdog Function
• Manufacturer: ATMEL Corporation

5.2.7
5.2.7.1
5.2.7.2
42
ATA6020N
Synchronous Serial Interface (SSI)
SSI Features
SSI Peripheral Configuration
The synchronous serial interface (SSI) can be used either for serial communication with external
devices such as EEPROMs, shift registers, display drivers, other microcontrollers, or as a
means for generating and capturing on-chip serial streams of data. External data communication
takes place via Port 4’s (BP4) multi-functional port which can be software configured by writing
the appropriate control word into the P4CR register. The SSI can be configured in any one of the
following ways:
Figure 5-23. Block Diagram of the Synchronous Serial Interface
• With Timer 2:
1. 2-wire external interface for bi-directional data communication with one data terminal
2. 3-wire external interface for simultaneous input and output of serial data, with a serial
3. Timer/SSI combined modes – the SSI used together with Timer 2 is capable of per-
– 2- and 3-wire NRZ
– 2-wire mode
– Bi-phase modulation
– Manchester modulation
– Pulse-width demodulation
– Burst modulation
and one shift clock. The SSI uses Port BP43 as a bi-directional serial data line (SD) and
BP40 as a shift clock line (SC).
input data terminal (SI), a serial output data terminal (SO) and a shift clock (SC). The
SSI uses BP40 as a shift clock (SC), while the serial data input (SI) is applied to BP43
(configured in P4CR as input). Serial output data (SO) in this case is passed through to
BP42 (configured in P4CR to T2O) via Timer 2 output stage (T2M2 configured in
mode 6).
forming a variety of data modulation and functions (see section
The modulating data is converted by the SSI into a continuous serial stream of data
which is in turn modulated in one of the timer functional blocks.
T1OUT
SYSCL
TOG2
POUT
SIC1
/2
SC
Shift_CL
SO
Transmit
Buffer
I/O-bus
SIC2
MSB
STB
SSI-Control
8-bit Shift Register
I/O-bus
SISC
SRB
Control
LSB
Receive
Buffer
SI
Timer 2
INT3
SO
“Timer 1” on page
Output
SI
SCI
4708D–4BMCU–09/05
SC
SD
27).