ATA6020N ATMEL Corporation, ATA6020N Datasheet - Page 15

• Manufacturer Part Number: ATA6020N
• Description: Low-current Microcontroller For Watchdog Function
• Manufacturer: ATMEL Corporation

4.4
4.4.1
Figure 4-12. Clock Module
4708D–4BMCU–09/05
OSC1
Clock Generation
Clock Module
Oscin
Ext. clock
ExIn
RC oscillator2
R
Trim
The ATA6020N contains a clock module with two different internal RC-oscillator types. OSC1
can be used as input for external clocks or to connect an external trimming resistor for RC-oscil-
lator 2. All necessary circuitry, except the trimming resistor, is integrated on-chip. One of these
oscillator types or an external input clock can be selected to generate the system clock
(SYSCL).
In applications that do not require exact timing, it is possible to use the fully integrated RC-oscil-
lator 1 without any external components. The RC-oscillator 1 center frequency tolerance is
better than ±50%. RC-oscillator 2 is a trimmable oscillator whereby the oscillator frequency can
be trimmed with an external resistor attached between OSC1 and GND. In this configuration,
RC-oscillator 2 frequency can be maintained stable to within a tolerance of ±15% over the full
operating temperature and voltage range.
The clock module is programmable via software with the clock management register (CM) and
the system configuration register (SC). The required oscillator configuration can be selected with
the OS1-bit and the OS0-bit in the SC-register. A programmable 4-bit divider stage allows the
adjustment of the system clock speed. A special feature of the clock management is that an
external oscillator may be used and switched on and off via a port pin for the power-down mode.
Before the external clock is switched off, the internal RC-oscillator 1 must be selected with the
CCS-bit and then the SLEEP mode may be activated. In this state an interrupt can wake up the
controller with the RC-oscillator, and the external oscillator can be activated and selected by
software. A synchronization stage avoids clock periods that are too short if the clock source or
the clock speed is changed. If an external input clock is selected, a supervisor circuit monitors
the external input and generates a hardware reset if the external clock source fails or drops
below 500 kHz for more than 1 ms.
SC
BOT
RCOut2
ExOut
- - -
Stop
Stop
OS1
OS0
Osc-Stop
Stop
oscillator 1
RC
CM
RCOut1
Control
NSTOP
IN1
IN2
Sleep
WDL
CCS
Cin
CSS1
/2
CSS0
/2
Divider
/2
/2
Cin/16
ATA6020N
SYSCL
SUBCL
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