ATA6020N ATMEL Corporation, ATA6020N Datasheet - Page 28

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ATA6020N

Manufacturer Part Number
ATA6020N
Description
Low-current Microcontroller For Watchdog Function
Manufacturer
ATMEL Corporation
Datasheet

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Figure 5-8.
28
ATA6020N
CL1
Write of the
T1C1 register
Timer 1 and Watchdog
T1C1
WDC
T1RM T1C2 T1C1 T1C0
WDL
Timer 1 can also be used as a watchdog timer to prevent a system from stalling. The watchdog
timer is a 3-bit counter that is supplied by a separate output of Timer 1. It generates a system
reset when the 3-bit counter overflows. To avoid this, the 3-bit counter must be reset before it
overflows. The application software has to accomplish this by reading the CWD register.
After power-on reset the watchdog must be activated by software in the $RESET initialization
routine. There are two watchdog modes, in one mode the watchdog can be switched on and off
by software, in the other mode the watchdog is active and locked. This mode can only be
stopped by carrying out a system reset.
The watchdog timer operation mode and the time interval for the watchdog reset can be pro-
grammed via the watchdog control register (WDC).
Figure 5-7.
WDR WDT1 WDT0
Decoder
Decoder
3
RES
CL
2
Q1 Q2 Q3 Q4
SUBCL
SYSCL
Timer 1 Module
mode control
Watchdog
RES
Q5
MUX for watchdog timer
MUX
MUX for interval timer
T1CS
Q6
CL1
Q8
Q8
Prescaler
14-bit
Q11
Q11
T1MUX
Q14
Q14
WDCL
T1C2
T1BP
T1MUX
SUBCL
WDCL
T1BP T1IM
Watchdog
Divider/8
T1IM
Watchdog
Divider
RESET
4-bit
Read of the
CWD register
T1IM=0
T1IM=1
INT2
T1OUT
RESET
(NRST)
NRST
INT2
T1OUT
4708D–4BMCU–09/05

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