PM5366-PI PMC-Sierra, Inc., PM5366-PI Datasheet - Page 170

• Manufacturer Part Number: PM5366-PI
• Description: HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
• Manufacturer: PMC-Sierra, Inc.

PRELIMINARY
DATASHEET
PMC-2010672
PROPRIETARY AND CONFIDENTIAL
Figure 13
Since the maximum number of CRC sub-multiframes that can occur in one
second is 1000, the 10-bit FEBE and CRCE counters cannot saturate in one
second. Despite this, there is not a linear relationship between BER and CRC-4
block errors due to the nature of the CRC-4 calculation. At BERs below 10
there tends to be no more than one bit error per sub-multiframe, so the number
of CRC-4 errors is generally equal to the number of bit errors, which is directly
related to the BER. However, at BERs above 10
due to more than one bit error. Thus, the relationship between BER and CRCE
count becomes non-linear above a 10
when using CRC-4 counts to determine the BER. Since FEBEs are indications of
CRCEs at the far end, and are accumulated identically to CRCEs, the same
explanation holds for the FEBE event counter.
The bit error rate for E1 can be calculated from the one-second PMON CRCE
count by the following equation:
Bit Error Rate = 1 - 10
- FER Count vs. BER (E1 mode)
9
8
7
6
5
4
3
2
1
0
0
ISSUE 1
Many 1 Second Intervals
Average Count Over
æ
ç
ç
ç
ç ç
è
log
æ
ç
è
1
50
−
* 8
8000
Framing Bit Error Count Per Second
8
256
CRCE
ö
÷
100
ö
-4
158
BER. This must be taken into account
150
-4
, each CRC-4 error is often
200
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
250
AND M13 MULTIPLEXER
PM5366 TEMAP-84
-4
,