ST72321AR9-Auto STMicroelectronics, ST72321AR9-Auto Datasheet - Page 225

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ST72321AR9-Auto

Manufacturer Part Number
ST72321AR9-Auto
Description
8-bit MCU for automotive with 60 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72321AR9-Auto

Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
ST72321xx-Auto
Note:
Table 142. Option byte 1 bit description
Table 143. Package selection (OPT7)
On the chip, each I/O port has up to eight pads. Pads that are not bonded to external pins
are in input pull-up configuration after reset. The configuration of these pads must be kept at
reset state to avoid added current consumption.
OPT5:4
OPT3:1 OSCRANGE[2:0]
OPT7
OPT6
OPT0
Bit
Version
(A)R
J
OSCTYPE[1:0]
PLLOFF
Name
PKG1
RSTC
Package selection bit 1
RESET clock cycle selection
Oscillator type
Oscillator range
PLL activation
Caution: The PLL can be enabled only if the OSCRANGE (OPT3:1) bits
are configured to “MP 2 ~ 4 MHz”. Otherwise, the device functionality is
not guaranteed.
This option bit, with the PKG0 bit, selects the package (see
Package selection
This option bit selects the number of CPU cycles applied during the
RESET phase and when exiting Halt mode. For resonator oscillators,
it is advised to select 4096 due to the long crystal stabilization time.
0: Reset phase with 4096 CPU cycles
1: Reset phase with 256 CPU cycles
These option bits select the ST7 main clock source type.
00: Clock source = Resonator oscillator
01: Reserved
10: Clock source = Internal RC oscillator
11: Clock source = External source
When the resonator oscillator type is selected, these option bits select
the resonator oscillator current source corresponding to the frequency
range of the resonator used. Otherwise, these bits are used to select
the normal operating frequency range.
000: Typ. frequency range = LP (1 ~ 2 MHz)
001: Typ. frequency range = MP (2 ~ 4 MHz)
010: Typ. frequency range = MS (4 ~ 8 MHz)
011: Typ. frequency range = HS (8 ~ 16 MHz)
This option bit activates the PLL which allows multiplication by two of
the main input clock frequency. The PLL must not be used with the
internal RC oscillator or with external clock source. The PLL is
guaranteed only with an input frequency between 2 and 4 MHz.
0: PLL x2 enabled
1: PLL x2 disabled
Selected package
Doc ID 13829 Rev 1
LQFP64
LQFP44
Device configuration and ordering information
(OPT7)).
Function
PKG1
1
0
PKG0
Table 143:
0
0
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