AD9874 Analog Devices, AD9874 Datasheet - Page 24

• Manufacturer Part Number: AD9874
• Description: Low Power IF Digitizing Subsystem
• Manufacturer: Analog Devices

Specifications of AD9874

• Resolution (bits): 24bit
• # Chan: 1
• Sample Rate: 26MSPS
• Interface: Ser
• Analog Input Type: Diff-Uni,SE-Uni
• Adc Architecture: Sigma-Delta
• Pkg Type: QFP

AD9874
Based on these characterization curves, a LNA/mixer bias
setting of 3_3 is suitable for most applications since it will
provide the greatest dynamic range in the presence of multiple
unfiltered interferers. However, portable radio applications
demanding the lowest possible power may benefit by changing
the LNA/mixer bias setting based on the received signal
strength power (i.e., RSSI) available from the SSI output data.
For instance, selecting an LNA_Mixer bias setting of 1_2 for
nominal input strength conditions (i.e., <–45 dBm) would
result in 4 mA current savings (i.e., 18% reduction). If the
signal exceeds this level, a bias setting of 3_3 could be
selected. Refer to the Typical Performance Characteristics for
more performance graphs characterizing the LNA and mixer’s
effect upon the AD9874’s noise and linearity performance
under different operating conditions.
A 16 dB step attenuator is also included within the LNA/
mixer circuitry to prevent large signals (i.e., > –18 dBm)
from overdriving the - modulator. In such instances, the
the receiver. The 16 dB step attenuator can be invoked by set-
ting the ATTEN bit (Register 0x03, Bit 7), causing the mixer
gain to be reduced by 16 dB. The 16 dB step attenuator could
be used in applications in which a potential target or blocker
signal could exceed the IF input clip point. Although the LNA
will be driven into compression, it may still be possible to
recover the desired signal if it is FM. Refer to TPC 7c to see
the gain compression characteristics of the LNA and mixer
with the 16 dB attenuator enabled.
Address
(Hex)
0x00
0x01
0x01
0x03
Figure 11c. LNA/Mixer Frequency Response vs. Bias Setting
- modulator will become unstable, thus severely desensitizing
Table IX. SPI Registers Associated with LNA/Mixer
–1
–2
–3
–4
–5
–6
–7
–8
0
0
Bit
Breakdown
(7:0)
(7:6)
(5:4)
(7)
100
1_2 SETTING
LNA_MIXER
FREQUENCY – MHz
200
Width
8
2
2
1
LNA_MIXER
3_3 SETTING
300
0
Default
Value
0xFF
0
0
400
Name
STBY
LNAB
MIXB
ATTEN
500
–24–
BAND-PASS SIGMA-DELTA ( - ) ADC
The ADC of the AD9874 is shown in Figure 12. The ADC
contains a sixth order multibit band-pass - modulator that
achieves very high instantaneous dynamic range over a narrow
frequency band. The loop filter of the band-pass - modulator
consists of two continuous-time resonators followed by a discrete-
time resonator, with each resonator stage contributing a pair of
complex poles. The first resonator is an external LC tank, while
the second is an on-chip active RC filter. The output of the LC
resonator is ac-coupled to the second resonator input via 100 pF
capacitors. The center frequencies of these two continuous-time
resonators must be tuned to f
properly. The center frequency of the discrete-time resonator
automatically scales with f
MXOP
Figure 13a shows the measured power spectral density measured
at the output of the undecimated band-pass - modulator.
Note that the wide dynamic range achieved at the center fre-
quency, f
the - modulator have been successfully tuned. The out-of-
band noise is removed by the decimation filters following
quadrature demodulation.
OUTPUT
MIXER
Figure 12. Equivalent Circuit of Sixth Order
Band-Pass - Modulator
Figure 13a. Measured Undecimated Spectral Out-
put of - Modulator ADC with f
and Noise Bandwidth of 3.3 kHz
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
CLK
0
0
MXON
/8, is achieved once the LC and RC resonators of
IF2N
IF2P
1
LC
EXTERNAL
CONTROL
DAC1
GAIN
2
CLK
NATOR
RESO-
3
FREQUENCY – MHz
RC
–2dBFS OUTPUT
CLK
, thus no tuning is required.
4
f
/8 for the ADC to function
CLK
NATOR
= 13 MSPS TO 26 MSPS
RESO-
5
SC
CLK
6
FLASH
f
NBW = 3.3kHz
LEVEL
= 18 MSPS
CLK
NINE-
ESL
7
= 18MHz
8
REV. A
TO DIGITAL
FILTER
9