AD6659 Analog Devices, AD6659 Datasheet - Page 2

• Manufacturer Part Number: AD6659
• Description: Dual IF Receiver
• Manufacturer: Analog Devices

Specifications of AD6659

• Resolution (bits): 12bit
• # Chan: 2
• Sample Rate: 80MSPS
• Interface: Par
• Analog Input Type: Diff-Bip
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD6659
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
General Description ......................................................................... 3
Specifications ..................................................................................... 4
Absolute Maximum Ratings ............................................................ 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 12
Equivalent Circuits ......................................................................... 14
Theory of Operation ...................................................................... 16
REVISION HISTORY
2/10―Rev. 0 to Rev. A
Changes to Title ................................................................................ 1
Changes to Features Section............................................................ 1
Changes to General Description Section ...................................... 3
1/10—Revision 0: Initial Version
DC Specifications ......................................................................... 4
AC Specifications .......................................................................... 5
Digital Specifications ................................................................... 6
Switching Specifications .............................................................. 7
Timing Specifications .................................................................. 8
Thermal Characteristics .............................................................. 9
ESD Caution .................................................................................. 9
ADC Architecture ...................................................................... 16
Analog Input Considerations .................................................... 16
Voltage Reference ....................................................................... 19
Clock Input Considerations ...................................................... 20
Power Dissipation and Standby Mode ..................................... 21
Rev. A | Page 2 of 40
Built-In Self-Test and Output Test ............................................... 24
Channel/Chip Synchronization .................................................... 25
Noise Shaping Requantizer (NSR) ............................................... 26
DC and Quadrature Error Correction (QEC) ............................ 27
Serial Port Interface (SPI) .............................................................. 29
Memory Map .................................................................................. 31
Applications Information .............................................................. 37
Outline Dimensions ....................................................................... 38
Digital Outputs ........................................................................... 22
Timing ......................................................................................... 22
BIST .............................................................................................. 24
Output Test Modes ..................................................................... 24
20% BW NSR Mode (16 MHz BW at 80 MSPS) .................... 26
Configuration Using the SPI ..................................................... 29
Hardware Interface ..................................................................... 30
Configuration Without the SPI ................................................ 30
SPI Accessible Features .............................................................. 30
Reading the Memory Map Register Table ............................... 31
Open Locations .......................................................................... 31
Default Values ............................................................................. 31
Memory Map Register Table ..................................................... 32
Memory Map Register Descriptions ........................................ 35
Design Guidelines ...................................................................... 37
Ordering Guide .......................................................................... 38