SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 845

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SAM3SD8B

Manufacturer Part Number
SAM3SD8B
Description
Manufacturer
Atmel Corporation
Datasheets
• PADV: Padding Value
0 = 0x00 value is used when padding data in write transfer.
1 = 0xFF value is used when padding data in write transfer.
PADV may be only in manual transfer.
• PDCMODE: PDC-oriented Mode
0 = Disables PDC transfer
1 = Enables PDC transfer. In this case, UNRE and OVRE flags in the MCI Mode Register (MCI_SR) are deactivated after
the PDC transfer has been completed.
• BLKLEN: Data Block Length
This field determines the size of the data block.
This field is also accessible in the HSMCI Block Register (HSMCI_BLKR).
Bits 16 and 17 must be set to 0 if FBYTE is disabled.
Note:
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
In SDIO Byte mode, BLKLEN field is not used.
SAM3S8/SD8
SAM3S8/SD8
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