SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 559

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SAM3SD8B

Manufacturer Part Number
SAM3SD8B
Description
Manufacturer
Atmel Corporation
Datasheets
28.5
28.6
28.6.1
28.6.2
28.6.3
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Pin Name List
Product Dependencies
I/O Lines
Power Management
Interrupt
Table 28-1.
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
Before using the SSC receiver, the PIO controller must be configured to dedicate the SSC
receiver I/O lines to the SSC peripheral mode.
Before using the SSC transmitter, the PIO controller must be configured to dedicate the SSC
transmitter I/O lines to the SSC peripheral mode.
Table 28-2.
The SSC is not continuously clocked. The SSC interface may be clocked through the Power
Management Controller (PMC), therefore the programmer must first configure the PMC to
enable the SSC clock.
The SSC interface has an interrupt line connected to the Nested Vector Interrupt Controller
(NVIC). Handling interrupts requires programming the NVIC before configuring the SSC. All
SSC interrupts can be enabled/disabled configuring the SSC Interrupt mask register. Each
pending and unmasked SSC interrupt will assert the SSC interrupt line. The SSC interrupt ser-
vice routine can get the interrupt origin by reading the SSC interrupt status register.
Table 28-3.
Pin Name
RF
RK
RD
TF
TK
TD
Instance
Instance
SSC
SSC
SSC
SSC
SSC
SSC
SSC
I/O Lines Description
I/O Lines
Peripheral IDs
Pin Description
Receiver Frame Synchro
Receiver Clock
Receiver Data
Transmitter Frame Synchro
Transmitter Clock
Transmitter Data
22
ID
Signal
RD
RF
RK
TD
TK
TF
I/O Line
PA18
PA20
PA19
PA17
PA15
PA16
SAM3S8/SD8
SAM3S8/SD8
Input/Output
Input/Output
Input/Output
Input/Output
Output
Peripheral
Type
Input
A
A
A
A
A
A
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