SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 175

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SAM3SD8B

Manufacturer Part Number
SAM3SD8B
Description
Manufacturer
Atmel Corporation
Datasheets
1 = trap unaligned halfword and word accesses.
If this bit is set to 1, an unaligned access generates a usage fault.
Unaligned LDM, STM, LDRD, and STRD instructions always fault irrespective of whether UNALIGN_TRP is set to 1.
• USERSETMPEND
Enables unprivileged software access to the STIR, see
0 = disable
1 = enable.
• NONEBASETHRDENA
Indicates how the processor enters Thread mode:
0 = processor can enter Thread mode only when no exception is active.
1 = processor can enter Thread mode from any level under the control of an EXC_RETURN value, see
on page
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
70.
“Software Trigger Interrupt Register” on page
SAM3S8/SD8
SAM3S8/SD8
161:
“Exception return”
175
175

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