AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 1278

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AT32UC3C0512CAU

Manufacturer Part Number
AT32UC3C0512CAU
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3C0512CAU

Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3C0512CAU-ALUT
Manufacturer:
Atmel
Quantity:
10 000
40.9.7
Table 40-52. SMC Clock Signal.
Note:
Table 40-53. SMC Read Signals with Hold Settings
Note:
32117C–AVR-08/11
Symbol
1/(t
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
CPSMC
1
2
3
4
5
7
8
9
10
11
12
13
14
16
17
18
1. The maximum frequency of the SMC interface is the same as the max frequency for the HSB.
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
2. hold length = total cycle duration - setup duration - pulse duration. “hold length” is for “ncs rd hold length” or “nrd hold length”.
)
EBI Timings
cess technology. These values are not covered by test limits in production.
Parameter
Data setup before NRD high
Data hold after NRD high
NRD high to NBS0/A0 change
NRD high to NBS1 change
NRD high to NBS2/A1 change
NRD high to A2 - A25 change
NRD high to NCS inactive
NRD pulse width
Data setup before NCS high
Data hold after NCS high
NCS high to NBS0/A0 change
NCS high to NBS0/A0 change
NCS high to NBS2/A1 change
NCS high to A2 - A25 change
NCS high to NRD inactive
NCS pulse width
Parameter
SMC Controller clock frequency
See EBI I/O lines description for more details.
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
NRD Controlled (READ_MODE = 1)
NRD Controlled (READ_MODE = 0)
(1)
pads set to the lowest,
pads set to the lowest,
drive strength of the
drive strength of the
external capacitor =
external capacitor =
V
V
Conditions
VDD
VDD
40pF
40pF
= 3.0V,
= 3.0V,
(nrd hold length - ncs rd hold length) *
(ncs rd hold length - nrd hold length) *
ncs rd hold length * t
ncs rd hold length * t
ncs rd pulse length * t
nrd pulse length * t
ncs rd hold length * t
ncs rd hold length * t
nrd hold length * t
nrd hold length * t
nrd hold length * t
nrd hold length * t
t
t
CPSMC
CPSMC
32.5
34.1
Min
0
0
- 1.3
- 2.2
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
Max
AT32UC3C
f
- 1.5
- 5.6
cpu
- 0.6
- 0
- 0
- 1.1
- 7.2
(1)
- 3
- 2
- 3
Units
Units
MHz
ns
ns
1278

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