AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 1020

• Manufacturer Part Number: AT32UC3C0512CAU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C0512CAU

• Flash (kbytes): 512 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 123
• Ext Interrupts: 144
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 20
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

33.7.23
Name:
Access Type:
Offset:
Reset Value:
This register can only be written if the WPSWS5 and WPHWS5 bits are cleared in
1029.
• FFILy: Fault y Filtering
• FMODy: Fault y Activation Mode
• FPOLy: Fault y Polarity
CAUTION: To prevent an unexpected activation of the FSy bit in the
can be set to one only if the FPOLy bit has been previously configured to its final value.
32117C–AVR-08/11
FMOD7
FPOL7
FFIL7
31
23
15
7
-
0: The fault input y is not filtered.
1: The fault input y is filtered.
0: The fault y is active as long as the fault input x is at FPOLy.
1: The fault y becomes active as soon as the fault input y is at FPOLy level. The fault y stays active until the fault input y is not at
FPOLy level AND until it is cleared in
0: The fault y becomes active when the fault input y is set to 0.
1: The fault y becomes active when the fault input y is set to 1.
Fault Mode Register
FMOD6
FPOL6
FFIL6
30
22
14
6
-
FMR
Read/Write
0x05C
0x00000000
FMOD5
FPOL5
FFIL5
29
21
13
5
-
”Fault Clear Register” on page
FMOD4
FPOL4
FFIL4
28
20
12
4
-
FMOD3
FPOL3
FFIL3
27
19
11
3
-
”Fault Status ReSister” on page
1022.
FMOD2
FPOL2
FFIL2
26
18
10
2
-
”Write Protect Status Register” on page
FMOD1
FPOL1
FFIL1
25
17
9
1
-
1021, the FMODy bit
AT32UC3C
FMOD0
FPOL0
FFIL0
24
16
8
0
-
1020