AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 1113

• Manufacturer Part Number: AT32UC3C0512CAU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C0512CAU

• Flash (kbytes): 512 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 123
• Ext Interrupts: 144
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 20
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

36.6.9
32117C–AVR-08/11
Power-up and Startup Time
To convert correct values, both references and ADC have to be powered-up correctly, otherwise
wrong values will be converted until the end of the start-up time.
When in sleep mode, the HOT start-up sequence is performed each time a conversion or a
sequence is triggered thanks to the SOCB bit in the SEQCFGx register. Indeed, the ADC analog
block is powered off while not used.
The end of the power-up sequence can be read from the Start-Up Time Done (SUTD) bit of the
SR register. This bit is set by hardware at the end of the start-up sequence and cleared by soft-
ware by writing a '1' in the SUTD bit of the SCR register. It is also cleared by hardware when the
ADCIFA is turned off then on by clearing and setting the ADCEN bit of the CFG register.
Figure 36-10. Power-Up Sequence
• Cold start-up: References needs 1 ms max to establish.
• Hot start-up: Once references are up, 24 CkADC clock periods are needed.
No
No
Yes
No
Wait for COLD start-up time
Wait for HOT start-up time
DONE and Seq Request?
START-UP not done
ADC turned off?
ADC is enabled?
START-UP done
SLEEP mode?
Yes
Yes
Yes
No
DONE?
Yes
AT32UC3C
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