STEVAL-PCC010V2 STMicroelectronics, STEVAL-PCC010V2 Datasheet - Page 88

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STEVAL-PCC010V2

Manufacturer Part Number
STEVAL-PCC010V2
Description
BOARD EVAL FOR ST802RT1A
Manufacturer
STMicroelectronics
Series
-r

Specifications of STEVAL-PCC010V2

Design Resources
STEVAL-PCC010V2 BOM STEVAL-PCC010V2 Schematic
Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
ST802RT1A, STM32F207
Primary Attributes
1 Port, 100BASE-TX/10BASE-T
Secondary Attributes
MII, RMII
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11465

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Electrical characteristics
88/163
A device reset allows normal operations to be resumed.
The test results are given in
defined in application note AN1709.
Table 36.
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and
prequalification tests in relation with the EMC level requested for his application.
Software recommendations
The software flowchart must include the management of runaway conditions such as:
Prequalification trials
Most of the common failures (unexpected reset and program counter corruption) can be
reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1
second.
To complete these trials, ESD stress can be applied directly on the device, over the range of
specification values. When unexpected behavior is detected, the software can be hardened
to prevent unrecoverable errors occurring (see application note AN1015).
Electromagnetic Interference (EMI)
The electromagnetic field emitted by the device are monitored while a simple application,
executing EEMBC
standard which specifies the test board and the pin loading.
V
V
Symbol
FESD
EFTB
Corrupted program counter
Unexpected reset
Critical Data corruption (control registers...)
Voltage limits to be applied on any I/O pin to
induce a functional disturbance
Fast transient voltage burst limits to be
applied through 100 pF on V
pins to induce a functional disturbance
EMS characteristics
®
code, is running. This emission test is compliant with SAE IEC61967-2
Parameter
Table
Doc ID 15818 Rev 6
36. They are based on the EMS levels and classes
DD
and V
SS
V
f
IEC 61000-4-2
V
f
IEC 61000-4-2
HCLK
HCLK
DD
DD
= 3.3 V, LQFP100, T
= 3.3 V, LQFP100, T
= 75 MHz, conforms to
= 75 MHz, conforms to
STM32F205xx, STM32F207xx
Conditions
A
A
= +25 °C,
= +25 °C,
Level/
Class
2B
4A

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