STEVAL-PCC010V2 STMicroelectronics, STEVAL-PCC010V2 Datasheet - Page 134

• Manufacturer Part Number: STEVAL-PCC010V2
• Description: BOARD EVAL FOR ST802RT1A
• Manufacturer: STMicroelectronics
• Series: -r

Specifications of STEVAL-PCC010V2

• Design Resources: STEVAL-PCC010V2 BOM STEVAL-PCC010V2 Schematic
• Main Purpose: Interface, Ethernet Controller (PHY and MAC)
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: ST802RT1A, STM32F207
• Primary Attributes: 1 Port, 100BASE-TX/10BASE-T
• Secondary Attributes: MII, RMII
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-11465

Electrical characteristics
Table 75.
1. C
2. Based on characterization, not tested in production.
134/163
t
t
t
t
t
t
t
t
t
t
t
t
t
w(NIOWR)
v(NIOWR-D)
h(NIOWR-D)
d(NCE4_1-NIOWR)
h(NCEx-NIOWR)
h(NCE4_1-NIOWR)
d(NIORD-NCEx)
d(NIORD-NCE4_1)
h(NCEx-NIORD)
h(NCE4_1-NIORD)
su(D-NIORD)
d(NIORD-D)
w(NIORD)
Symbol
L
= 15 pF.
Switching characteristics for PC Card/CF read and write cycles
NAND controller waveforms and timings
Figure 68
corresponding timings. The results shown in this table are obtained with the following FSMC
configuration:
●
●
●
●
●
●
●
●
●
●
●
●
●
●
FSMC_NIOWR low width
FSMC_NIOWR low to FSMC_D[15:0] valid
FSMC_NIOWR high to FSMC_D[15:0] invalid
FSMC_NCE4_1 low to FSMC_NIOWR valid
FSMC_NCEx high to FSMC_NIOWR invalid
FSMC_NCE4_1 high to FSMC_NIOWR invalid
FSMC_NCEx low to FSMC_NIORD valid FSMC_NCE4_1
low to FSMC_NIORD valid
FSMC_NCEx high to FSMC_NIORD invalid
FSMC_NCE4_1 high to FSMC_NIORD invalid
FSMC_D[15:0] valid before FSMC_NIORD high
FSMC_D[15:0] valid after FSMC_NIORD high
FSMC_NIORD low width
COM.FSMC_SetupTime = 0x01;
COM.FSMC_WaitSetupTime = 0x03;
COM.FSMC_HoldSetupTime = 0x02;
COM.FSMC_HiZSetupTime = 0x01;
ATT.FSMC_SetupTime = 0x01;
ATT.FSMC_WaitSetupTime = 0x03;
ATT.FSMC_HoldSetupTime = 0x02;
ATT.FSMC_HiZSetupTime = 0x01;
Bank = FSMC_Bank_NAND;
MemoryDataWidth = FSMC_MemoryDataWidth_16b;
ECC = FSMC_ECC_Enable;
ECCPageSize = FSMC_ECCPageSize_512Bytes;
TCLRSetupTime = 0;
TARSetupTime = 0;
through
Figure 71
Parameter
represent synchronous waveforms and
Doc ID 15818 Rev 6
8T
11T
5T
5T
4.5
9
8T
STM32F205xx, STM32F207xx
HCLK
HCLK
HCLK
HCLK
HCLK
Min
+ 3
– 5
– 5
+ 2
(1)(2)
Table 76
5T
5T
5T
(continued)
HCLK
HCLK
HCLK
Max
provides the
+3ns
+1
+ 2.5 ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns