STEVAL-PCC010V2 STMicroelectronics, STEVAL-PCC010V2 Datasheet - Page 28
STEVAL-PCC010V2
Manufacturer Part Number
STEVAL-PCC010V2
Description
BOARD EVAL FOR ST802RT1A
Manufacturer
STMicroelectronics
Series
-r
Datasheets
1.ST802RT1AFR.pdf
(58 pages)
2.STM32F205RBT6.pdf
(163 pages)
3.STEVAL-PCC010V2.pdf
(34 pages)
4.STEVAL-PCC010V2.pdf
(7 pages)
Specifications of STEVAL-PCC010V2
Design Resources
STEVAL-PCC010V2 BOM STEVAL-PCC010V2 Schematic
Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
ST802RT1A, STM32F207
Primary Attributes
1 Port, 100BASE-TX/10BASE-T
Secondary Attributes
MII, RMII
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11465
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- ST802RT1AFR PDF datasheet
- STM32F205RBT6 PDF datasheet #2
- STEVAL-PCC010V2 PDF datasheet #3
- STEVAL-PCC010V2 PDF datasheet #4
- Current page: 28 of 163
- Download datasheet (3Mb)
Description
2.2.23
2.2.24
2.2.25
2.2.26
2.2.27
28/163
Independent watchdog
The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is
clocked from an independent 32 kHz internal RC and as it operates independently from the
main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog
to reset the device when a problem occurs, or as a free-running timer for application timeout
management. It is hardware- or software-configurable through the option bytes.
The counter can be frozen in debug mode.
Window watchdog
The window watchdog is based on a 7-bit downcounter that can be set as free-running. It
can be used as a watchdog to reset the device when a problem occurs. It is clocked from the
main clock. It has an early warning interrupt capability and the counter can be frozen in
debug mode.
SysTick timer
This timer is dedicated to real-time operating systems, but could also be used as a standard
downcounter. It features:
●
●
●
●
I²C bus
Up to three I²C bus interfaces can operate in multimaster and slave modes. They can
support the Standard- and Fast-modes. They support the 7/10-bit addressing mode and the
7-bit dual addressing mode (as slave). A hardware CRC generation/verification is
embedded.
They can be served by DMA and they support SMBus 2.0/PMBus.
Universal synchronous/asynchronous receiver transmitters
(UARTs/USARTs)
The STM32F205xx and STM32F207xx embed four universal synchronous/asynchronous
receiver transmitters (USART1, USART2, USART3 and USART6) and two universal
asynchronous receiver transmitters (UART4 and UART5).
These six interfaces provide asynchronous communication, IrDA SIR ENDEC support,
multiprocessor communication mode, single-wire half-duplex communication mode and
have LIN Master/Slave capability. The USART1 and USART6 interfaces are able to
communicate at speeds of up to 7.5 Mbit/s. The other available interfaces communicate at
up to 3.75 Mbit/s.
USART1, USART2, USART3 and USART6 also provide hardware management of the CTS
and RTS signals, Smart Card mode (ISO 7816 compliant) and SPI-like communication
capability. All interfaces can be served by the DMA controller.
A 24-bit downcounter
Autoreload capability
Maskable system interrupt generation when the counter reaches 0
Programmable clock source
Doc ID 15818 Rev 6
STM32F205xx, STM32F207xx
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