LH28F400BVE-TL85 Sharp Electronics, LH28F400BVE-TL85 Datasheet - Page 5

• Manufacturer Part Number: LH28F400BVE-TL85
• Manufacturer: Sharp Electronics

Specifications of LH28F400BVE-TL85

• Cell Type: NOR
• Density: 4Mb
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 19/18Bit
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7/3.3/5/12V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7/4.5V
• Operating Supply Voltage (max): 3.6/5.5V
• Word Size: 8/16Bit
• Number Of Words: 512K/256K
• Supply Current: 65mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

1 INTRODUCTION
This datasheet contains LH28F400BVE-TL85
specifications. Section 1 provides a flash memory
overview. Sections 2, 3, 4 and 5 describe the memory
organization and functionality. Section 6 covers electrical
specifications.
1.1 Features
Key enhancements of LH28F400BVE-TL85
SmartVoltage Flash memory are:
Please note following important differences:
1.2 Product Overview
The LH28F400BVE-TL85 is a high-performance 4M-bit
SmartVoltage Flash memory organized as 512K-byte of 8
bits or 256K-word of 16 bits. The 512K-byte/256K-word
of data is arranged in two 8K-byte/4K-word boot blocks,
six 8K-byte/4K-word parameter blocks and seven 64K-
byte/32K-word main blocks which are individually
erasable in-system. The memory map is shown in Figure
3.
SmartVoltage technology provides a choice of V
V
performance and power expectations. 2.7V V
approximately one-fifth the power of 5V V
PP
SmartVoltage Technology
Enhanced Suspend Capabilities
Boot Block Architecture
V
and 5V block erase and word/byte write operations.
The V
for designs that switch V
To take advantage of SmartVoltage technology, allow
V
CC
combinations, as shown in Table 1, to meet system
PPLK
and V
PP
has been lowered to 1.5V to support 2.7V, 3.3V
voltage transitions to GND is recommended
PP
connection to 2.7V, 3.3V or 5V.
PP
off during read operation.
CC
CC
. But, 5V
consumes
CC
and
V
3.3V and 5V eliminates the need for a separate 12V
converter, while V
word/byte write performance. In addition to flexible erase
and program voltages, the dedicated V
complete data protection when V
Internal V
configures the device for optimized read and write
operations.
A Command User Interface (CUI) serves as the interface
between the system processor and internal operation of the
device. A valid command sequence written to the CUI
initiates device automation. An internal Write State
Machine (WSM) automatically executes the algorithms
and timings necessary for block erase and word/byte write
operations.
A block erase operation erases one of the device’s 32K-
word blocks typically within 0.39s (5V V
4K-word blocks typically within 0.25s (5V V
V
independently erased 100,000 times. Block erase suspend
mode allows system software to suspend block erase to
read or write data from any other block.
Writing memory data is performed in
increments of the device’s 32K-word blocks typically
within 8.4µs (5V V
typically within 17µs (5V V
write suspend mode enables the system to read data or
execute code from any other flash memory array location.
Table 1. V
CC
PP
) independent of other blocks. Each block can be
provides the highest read performance. V
V
CC
CC
CC
2.7V
3.3V
Voltage
5V
and V
and V
SmartVoltage Technology
PP
PP
PP
=12V maximizes block erase and
CC
Voltage Combinations Offered by
detection Circuitry automatically
, 12V V
CC
PP
2.7V, 3.3V, 5V, 12V
, 12V V
PP
3.3V, 5V, 12V
V
V
), 4K-word blocks
PPLK
PP
5V, 12V
Voltage
PP
.
CC
PP
). Word/byte
, 12V V
pin gives
word/byte
PP
Rev. 1.02
CC
at 2.7,
, 12V
PP
),