SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 64

• Manufacturer Part Number: SAA7114HV2
• Manufacturer: NXP Semiconductors

Specifications of SAA7114HV2

• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
9. Input/output interfaces and ports
SAA7114_3
Product data sheet
9.1 Analog terminals
9.2 Audio clock signals
The SAA7114 has 5 different I/O interfaces:
The SAA7114 has 6 analog inputs AI21 to AI24, AI11 and AI12 for composite video CVBS
or S-video Y/C signal pairs. Additionally, there are two differential reference inputs, which
must be connected to ground via a capacitor equivalent to the decoupling capacitors at
the 6 inputs. There are no peripheral components required other than these decoupling
capacitors and 18 /56
application example in
via the clock frequency.
Clamp and gain control for the two ADCs are also integrated. An analog video output
(pin AOUT) is provided for testing purposes.
Table 25:
[1]
The SAA7114 also synchronizes the audio clock and sampling rate to the video frame
rate, via a very slow PLL. This ensures that the multimedia capture and compression
processes always gather the same predefined number of samples per video frame.
An audio master clock AMCLK and two divided clocks ASCLK and ALRCLK are
generated:
Symbol
AI24 to AI21
AI12 and AI11
AOUT
AI1D and AI2D
•
•
•
•
•
•
•
•
Analog video input interface, for analog CVBS and/or Y and C input signals
Audio clock port
Digital real-time signal port (RT port)
Digital video expansion port (X port), for unscaled digital video input and output
Digital image port (I port) for scaled video data output and programming
Digital host port (H port) for extension of the image port or expansion port from
8-bit to 16-bit
Pin numbers for LQFP100 in parenthesis.
ASCLK: can be used as audio serial clock
ALRCLK: audio left/right channel clock
Analog pin description
Pin
P6, P7, P9 and P10
(10, 12, 14 and 16)
P11 and P13
(18 and 20)
M10 (22)
P12 and P8
(19 and 13)
[1]
Rev. 03 — 17 January 2006
Figure
termination resistors, one set per connected input signal; see
53. Two anti-alias filters are integrated, and self adjusting
I/O
I
I
O
I
Description
analog video signal inputs, e.g.
2 CVBS signals and two Y/C pairs
can be connected simultaneously
analog video signal inputs, e.g.
2 CVBS signals and two Y/C pairs
can be connected simultaneously
analog video output, for test
purposes
analog reference pins for differential
ADC operation
PAL/NTSC/SECAM video decoder
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
SAA7114
Bit
MODE3 to
MODE0
MODE3 to
MODE0
AOSL1 and
AOSL0
-
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