SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 40

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SAA7114HV2

Manufacturer Part Number
SAA7114HV2
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7114HV2

Lead Free Status / Rohs Status
Compliant
Philips Semiconductors
SAA7114_3
Product data sheet
8.3.1 Acquisition control and task handling (subaddresses 80h, 90h, 91h,
The video scaler receives its input signal from the video decoder or from the expansion
port (X port). It gets 16-bit Y-C
from the decoder. Discontinuous data stream can be accepted from the expansion port
(X port), normally 8-bit wide ITU 656 such as Y-C
qualifier on XDQ.
The input data stream is sorted into two data paths, one for luminance (or raw samples)
and one for time-multiplexed chrominance C
format is converted to 4 : 2 : 2 for the horizontal prescaling and vertical filter scaling
operation.
The scaler operation is defined by two programming pages A and B, representing two
different tasks, that can be applied field alternating or to define two regions in a field (e.g.
with different scaling range, factors and signal source during odd and even fields).
Each programming page contains control:
Raw VBI data is handled as a specific input format and needs its own programming page
(equals own task).
In VBI pass through operation the processing of prescaler and vertical scaling has to be
set to no-processing, however, the horizontal fine scaling VPD can be activated.
Upscaling (oversampling, zooming), free of frequency folding, up to a factor of 3.5 can be
achieved, as required by some software data slicing algorithms.
These raw samples are transported through the image port as valid data and can be
output as Y only format. The lines are framed by SAV and EAV codes.
94h to 9Fh and C4h to CFh)
The acquisition control receives horizontal and vertical synchronization signals from the
decoder section or from the X port. The acquisition window is generated via pixel and line
counters at the appropriate places in the data path. From X port only qualified pixels and
lines (lines with qualified pixel) are counted.
The acquisition window parameters are as follows:
2. Input from X port: 60 Hz, 720 pixel, 240 lines, 8-bit data at 27 MHz data rate
(ITU 656), 2 cycles per pixel; output via I + H port: 16-bit data at 27 MHz clock,
1 cycle per pixel; the maximum HV_zoom is equal to:
For signal source selection and formats
For task handling and trigger conditions
For input and output acquisition window definition
For H-prescaler, V-scaler and H-phase scaling
Signal source selection regarding input video stream and formats from the decoder, or
from X port (programming bits SCSRC[1:0] 91h[5:4] and FSC[2:0] 91h[2:0])
Remark: The input of raw VBI data from the internal decoder should be controlled via
the decoder output formatter and the LCR registers; see
0.98
16.666 ms 22 64 s
--------------------------------------------------------- -
720 240 1 37 ns
Rev. 03 — 17 January 2006
B
-C
=
R
2.34
4 : 2 : 2 input data at a continuous rate of 13.5 MHz
B
and C
B
-C
R
R
PAL/NTSC/SECAM video decoder
samples. An Y-C
data, accompanied by a pixel
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Section 8.2
SAA7114
B
-C
R
4 : 1 : 1 input
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