EP1AGX90EF1152I6N Altera, EP1AGX90EF1152I6N Datasheet - Page 4

IC ARRIA GX FPGA 90K 1152FBGA

EP1AGX90EF1152I6N

Manufacturer Part Number
EP1AGX90EF1152I6N
Description
IC ARRIA GX FPGA 90K 1152FBGA
Manufacturer
Altera
Series
Arria GXr
Datasheet

Specifications of EP1AGX90EF1152I6N

Number Of Logic Elements/cells
90220
Number Of Labs/clbs
4511
Total Ram Bits
4477824
Number Of I /o
538
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1152-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2387

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1AGX90EF1152I6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1AGX90EF1152I6N
Manufacturer:
ALTERA
0
1–2
Table 1–1. Arria GX Device Features (Part 1 of 2)
Arria GX Device Handbook, Volume 1
Package
ALMs
Equivalent
logic
elements
(LEs)
Transceiver
channels
Transceiver
data rate
Source-
synchronous
receive
channels
Feature
484-pin,
780-pin
(Flip chip)
EP1AGX20C
600 Mbps
to 3.125
21,580
8,632
Gbps
31
C
4
Table 1–1
packages.
Main device features:
484-pin
(Flip chip)
TriMatrix memory consisting of three RAM block sizes to implement true
dual-port memory and first-in first-out (FIFO) buffers with performance up to
380 MHz
Up to 16 global clock networks with up to 32 regional clock networks per
device
High-speed DSP blocks provide dedicated implementation of multipliers,
multiply-accumulate functions, and finite impulse response (FIR) filters
Up to four enhanced phase-locked loops (PLLs) per device provide spread
spectrum, programmable bandwidth, clock switch-over, and advanced
multiplication and phase shifting
Support for numerous single-ended and differential I/O standards
High-speed source-synchronous differential I/O support on up to 47 channels
Support for source-synchronous bus standards, including SPI-4 Phase 2
(POS-PHY Level 4), SFI-4.1, XSBI, UTOPIA IV, NPSI, and CSIX-L1
Support for high-speed external memory including DDR and DDR2 SDRAM,
and SDR SDRAM
Support for multiple intellectual property megafunctions from Altera
MegaCore
Support for remote configuration updates
600 Mbps to 3.125
31
lists Arria GX device features for FineLine BGA (FBGA) with flip chip
C
EP1AGX35C/D
4
13,408
33,520
Gbps
®
780-pin
(Flip chip)
functions and Altera Megafunction Partners Program (AMPP
31
D
8
484-pin
(Flip chip)
600 Mbps to 3.125
31
C
4
EP1AGX50C/D
20,064
50,160
Gbps
780-pin,
1152-pin
(Flip chip)
31, 42
D
8
484-pin
(Flip chip)
Chapter 1: Arria GX Device Family Overview
31
C
4
600 Mbps to 3.125 Gbps
© December 2009 Altera Corporation
EP1AGX60C/D/E
780-pin
(Flip chip)
24,040
60,100
31
D
8
1152-pin
(Flip chip)
12
42
E
®
Features
SM
)
EP1AGX90E
1152-pin
(Flip chip)
600 Mbps
to 3.125
36,088
90,220
Gbps
12
47
E

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