AD7792BRUZ Analog Devices Inc, AD7792BRUZ Datasheet - Page 18

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AD7792BRUZ

Manufacturer Part Number
AD7792BRUZ
Description
IC ADC 16BIT SIG-DEL 3CH 16TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7792BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
16
Sampling Rate (per Second)
500
Number Of Converters
1
Power Dissipation (max)
2.5mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
16bit
Sampling Rate
470SPS
Input Channel Type
Differential
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Voltage Range - Digital
2.7V To 5.25V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7792EBZ - BOARD EVALUATION FOR AD7792
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD7792/AD7793
Bit Location
CON7
CON6 to
CON5
CON4
CON3
CON2 to
CON0
DATA REGISTER
RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000(00)
The conversion result from the ADC is stored in this data register. This is a read-only register. On completion of a read operation from
this register, the RDY bit/pin is set.
ID REGISTER
RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xXA (AD7792)/0xXB (AD7793)
The identification number for the AD7792/AD7793 is stored in the ID register. This is a read-only register.
IO REGISTER
RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00
The IO register is an 8-bit register from which data can be read or to which data can be written. This register is used to enable and select
the value of the excitation currents. Table 18 outlines the bit designations for the IO register. IO0 through IO7 indicate the bit locations;
IO denotes that the bits are in the IO register. IO7 denotes the first bit of the data stream. The number in parentheses indicates the power-
on/reset default status of that bit.
IO7
0(0)
IO6
0(0)
Bit Name
REFSEL
0
BUF
0
CH2 to
CH0
IO5
0(0)
Description
Reference Select Bit. The reference source for the ADC is selected using this bit.
REFSEL
0
1
These bits must be programmed with a Logic 0 for correct operation.
Configures the ADC for buffered or unbuffered mode of operation. If cleared, the ADC operates in unbuffered
mode, lowering the power consumption of the device. If set, the ADC operates in buffered mode, allowing the
user to place source impedances on the front end without contributing gain errors to the system. The buffer
can be disabled when the gain equals 1 or 2. For higher gains, the buffer is automatically enabled.
With the buffer disabled, the voltage on the analog input pins can be from 30 mV below GND to 30 mV above
AV
to 100 mV within the power supply rails.
This bit must be programmed with a Logic 0 for correct operation.
Channel Select Bits. Written by the user to select the active analog input channel to the ADC.
CH2
0
0
0
0
1
1
1
1
DD
IO4
0(0)
. When the buffer is enabled, it requires some headroom, so the voltage on any input pin must be limited
CH1
0
0
1
1
0
0
1
1
Reference Source
External Reference Applied between REFIN(+) and REFIN(–).
Internal Reference Selected.
IO3
IEXCDIR1(0)
0
CH0
0
1
0
1
0
1
1
Channel
AIN1(+) – AIN1(–)
AIN2(+) – AIN2(–)
AIN3(+) – AIN3(–)
AIN1(–) – AIN1(–)
Reserved
Reserved
Temp Sensor
AV
Rev. B | Page 18 of 32
DD
Monitor
IO2
IEXCDIR0(0)
Calibration Pair
0
1
2
0
Automatically selects gain = 1 and internal reference
Automatically selects gain = 1/6 and 1.17 V
reference
IO1
IEXCEN1(0)
IO0
IEXCEN0(0)

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