LTC2408CG Linear Technology, LTC2408CG Datasheet - Page 9

IC A/D CONV 24BIT 8-CHAN 28-SSOP

LTC2408CG

Manufacturer Part Number
LTC2408CG
Description
IC A/D CONV 24BIT 8-CHAN 28-SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2408CG

Number Of Bits
24
Sampling Rate (per Second)
7.5
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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PIN
TYPICAL PERFOR A CE CHARACTERISTICS
GND (Pins 1, 5, 6, 16, 18, 22, 27, 28): Ground. Should be
connected directly to a ground plane through a minimum
length trace or it should be the single-point-ground in a
single point grounding system.
V
5.5V. Bypass to GND with a 10 F tantalum capacitor in
parallel with 0.1 F ceramic capacitor as close to the part
as possible.
V
is 0.1V to V
ADCIN (Pin 4): Analog Input. The input voltage range is
– 0.125 • V
voltage range may be limited by the pin absolute maxi-
mum rating of – 0.3V to V
MUXOUT (Pin 7): MUX Output. This pin is the output of the
multiplexer. Tie to ADCIN for normal operation.
CH0 (Pin 9): Analog Multiplexer Input.
CH1 (Pin 10): Analog Multiplexer Input.
CH2 (Pin 11): Analog Multiplexer Input.
CH3 (Pin 12): Analog Multiplexer Input.
CH4 (Pin 13): Analog Multiplexer Input. No connect on the
LTC2404.
CC
REF
U
(Pins 2, 8): Positive Supply Voltage. 2.7V
(Pin 3): Reference Input. The reference voltage range
FUNCTIONS
U
REF
CC
.
to 1.125 • V
18
16
14
10
24
22
20
12
8
0
INL vs Maximum Output Rate
U
5
10
MAXIMUM OUTPUT RATE (Hz)
T
15 20 25
CC
A
REF
= 90 C
W
+ 0.3V.
. For V
U
30 35 40 45 50 55
T
V
V
F
(20480 MAXIMUM
OUTPUT RATE)
A
0
CC
REF
= 25 C
REF
= EXTERNAL
= 5V
= 5V
> 2.5V the input
24048 G27
60
V
CC
CH5 (Pin 14): Analog Multiplexer Input. No connect on the
LTC2404.
CH6 (Pin 15): Analog Multiplexer Input. No connect on the
LTC2404.
CH7 (Pin 17): Analog Multiplexer Input. No connect on the
LTC2404.
CLK (Pin 19): Shift Clock for Data In. This clock synchro-
nizes the serial data transfer into the MUX. For normal
operation, drive this pin in parallel with SCK.
CSMUX (Pin 20): MUX Chip Select Input. A logic high on
this input allows the MUX to receive a channel address. A
logic low enables the selected MUX channel and connects
it to the MUXOUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CSADC.
D
is shifted into this input on the last four rising CLK edges
before CSMUX goes low.
CSADC (Pin 23): ADC Chip Select Input. A low on this pin
enables the SDO digital output and following each conver-
sion, the ADC automatically enters the Sleep mode and
remains in this low power state as long as CSADC is high.
A high on this pin also disables the SDO digital output. A
low-to-high transition on CSADC during the Data Output
IN
(Pin 21): Digital Data Input. The multiplexer address
22
20
18
16
14
12
10
24
8
0
Resolution vs Maximum
Output Rate
*RESOLUTION =
5
V
CC
10
MAXIMUM OUTPUT RATE (Hz)
= V
15 20 25
REF
= 3V
LOG(V
LTC2404/LTC2408
30 35 40 45 50 55
REF
F
(20480 MAXIMUM
OUTPUT RATE)
LOG (2)
O
/RMS NOISE)
= EXTERNAL
V
CC
T
T
A
A
= V
= 25 C
= 90 C
REF
24048 G28
= 5V
60
9

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