MAX1198ECM+D Maxim Integrated Products, MAX1198ECM+D Datasheet - Page 6

IC ADC 8BIT 100MSPS DUAL 48-TQFP

MAX1198ECM+D

Manufacturer Part Number
MAX1198ECM+D
Description
IC ADC 8BIT 100MSPS DUAL 48-TQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1198ECM+D

Number Of Bits
8
Sampling Rate (per Second)
100M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
314mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Conversion Rate
100 MSPs
Resolution
8 bit
Snr
48.5 dB
Voltage Reference
2.048 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Power Dissipation
1000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Input Voltage
3.3 V
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
ELECTRICAL CHARACTERISTICS (continued)
(V
10kΩ resistor, V
otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at
T
6
Note 1: Guaranteed by design. Not subject to production testing.
Note 2: Intermodulation distortion is the total power of the intermodulation products relative to the total input power.
Note 3: Analog attenuation is defined as the amount of attenuation of the fundamental bin from a converted FFT between two
Note 4: REFIN and REFOUT should be bypassed to GND with a 0.1µF (min) and 2.2µF (typ) capacitor.
Note 5: REFP, REFN, and COM should be bypassed to GND with a 0.1µF (min) and 2.2µF (typ) capacitor.
Note 6: Typical analog output current at f
Note 7: See Figure 3 for detailed system timing diagrams. Clock to data valid timing is measured from 50% of the clock
Note 8: Crosstalk rejection is tested by applying a test tone to one channel and holding the other channel at DC level.
Note 9: Amplitude matching is measured by applying the same signal to each channel and comparing the magnitude of the funda-
Note 10: Phase matching is measured by applying the same signal to each channel and comparing the phase of the fundamental
Note 11: SINAD settles to within 0.5dB of its typical value in unbuffered external reference mode.
Wake-Up Time
CHANNEL-TO-CHANNEL MATCHING
Crosstalk
Gain Matching
Phase Matching
A
DD
= +25°C.)
_______________________________________________________________________________________
= 3.3V, OV
applied input signals with the same magnitude (peak-to-peak) at f
see Typical Operating Characteristics.
level to 50% of the data output level.
Crosstalk is measured by calculating the power ratio of the fundamental of each channel’s FFT.
mental of the calculated FFT.
of the calculated FFT. The data from both ADC channels must be captured simultaneously during this test.
PARAMETER
IN
DD
= 2V
= 2.5V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
P-P
(differential with respect to COM), C
SYMBOL
t
WAKE
INA & B
Wake up from sleep mode
Wake up from shutdown mode (Note 11)
f
f
f
INA or B
INA or B
INA or B
= 20MHz. For digital output currents vs. analog input frequency,
= 20MHz at -1dB FS (Note 8)
= 20MHz at -1dB FS (Note 9)
= 20MHz at -1dB FS (Note 10)
L
= 10pF at digital outputs, f
CONDITIONS
IN1
and f
IN2
.
CLK
= 100MHz, T
MIN
T YP
0.05
± 0.1
- 72
20
1
A
= T
MIN
MAX
to T
MAX
Degrees
UNITS
, unless
dB
dB
µs

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