MAX1198ECM+D Maxim Integrated Products, MAX1198ECM+D Datasheet - Page 10

IC ADC 8BIT 100MSPS DUAL 48-TQFP

MAX1198ECM+D

Manufacturer Part Number
MAX1198ECM+D
Description
IC ADC 8BIT 100MSPS DUAL 48-TQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1198ECM+D

Number Of Bits
8
Sampling Rate (per Second)
100M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
314mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Conversion Rate
100 MSPs
Resolution
8 bit
Snr
48.5 dB
Voltage Reference
2.048 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Power Dissipation
1000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Input Voltage
3.3 V
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
10
2, 6, 11, 14, 15
3, 7, 10, 13, 16
29, 30, 35, 36
31, 34
32, 33
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PIN
12
17
18
19
20
21
22
23
24
25
26
27
28
37
38
39
40
41
1
4
5
8
9
NAME
SLEEP
OGND
OV
COM
INA+
INB+
GND
INA-
INB-
CLK
D7B
D6B
D5B
D4B
D3B
D2B
D1B
D0B
N.C.
D0A
D1A
D2A
D3A
D4A
V
T/B
PD
OE
DD
DD
Common-Mode Voltage I/O. Bypass to GND with a ≥0.1µF capacitor.
Analog Supply Voltage. Bypass to GND with a capacitor combination of 2.2µF in parallel with
0.1µF.
Analog Ground
Channel A Positive Analog Input. For single-ended operation connect signal source to INA+.
Channel A Negative Analog Input. For single-ended operation connect INA- to COM.
Channel B Negative Analog Input. For single-ended operation connect INB- to COM.
Channel B Positive Analog Input. For single-ended operation connect signal source to INB+.
Converter Clock Input
T/B Selects the ADC Digital Output Format
High: Two’s complement
Low: Straight offset binary
Sleep Mode Input
High: Disables both quantizers, but leaves the reference bias circuit active
Low: Normal operation
Active-High Power-Down Input
High: Power-down mode
Low: Normal operation
Active-Low Output Enable Input
High: Digital outputs disabled
Low: Digital outputs enabled
Three-State Digital Output, Bit 7 (MSB), Channel B
Three-State Digital Output, Bit 6, Channel B
Three-State Digital Output, Bit 5, Channel B
Three-State Digital Output, Bit 4, Channel B
Three-State Digital Output, Bit 3, Channel B
Three-State Digital Output, Bit 2, Channel B
Three-State Digital Output, Bit 1, Channel B
Three-State Digital Output, Bit 0, Channel B
No Connection
Output Driver Ground
Output Driver Supply Voltage. Bypass to OGND with a capacitor combination of 2.2µF in parallel
with 0.1µF.
Three-State Digital Output, Bit 0, Channel A
Three-State Digital Output, Bit 1, Channel A
Three-State Digital Output, Bit 2, Channel A
Three-State Digital Output, Bit 3, Channel A
Three-State Digital Output, Bit 4, Channel A
FUNCTION
Pin Description

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