IS43R32400D-5BL ISSI, Integrated Silicon Solution Inc, IS43R32400D-5BL Datasheet - Page 46

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IS43R32400D-5BL

Manufacturer Part Number
IS43R32400D-5BL
Description
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
DDR SDRAMr
Datasheet

Specifications of IS43R32400D-5BL

Organization
4Mx32
Density
128Mb
Address Bus
14b
Access Time (max)
700ps
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
2.6V
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.5V
Supply Current
185mA
Pin Count
144
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
IS43R32400D-5BL
Manufacturer:
ISSI
Quantity:
1 061
Part Number:
IS43R32400D-5BLI
Manufacturer:
ISSI
Quantity:
767
IS43R32400D, IS43R16800D
During Write bursts, the first valid data-in element will be registered on the first rising edge of DQS following the
WRITE command, and the subsequent data elements will be registered on successive edges of DQS. The Low state
of DQS between the WRITE command and the first rising edge is called the write preamble, and the Low state on
DQS following the last data-in element is called the write postamble. The time between the WRITE command and the
first corresponding rising edge of DQS (tDQSS) is specified with a relatively wide range - from 75% to 125% of a clock
cycle. The figure below shows the two extremes of tDQSS for a burst of 4. Upon completion of a burst, assuming no
other commands have been initiated, the DQs will remain high-Z and any additional input data will be ignored.
WRITE to WRITE
Data for any WRITE burst may be concatenated with or truncated with a subsequent WRITE command. In either case,
a continuous flow of input data, can be maintained. The new WRITE command can be issued on any positive edge of
the clock following the previous WRITE command.
The first data-in element from the new burst is applied after either the last element of a completed burst or the last
desired data element of a longer burst which is being truncated. The new WRITE command should be issued X cycles
after the first WRITE command, where X equals the number of desired data-in element pairs.
WRITE to READ
Data for any Write burst may be followed by a subsequent READ command. To follow a Write without truncating the
write burst, tWTR should be met as shown in Non-interrupting Write to Read.
Data for any Write burst may be truncated by a subsequent READ command as shown in Figure Interrupting Write to
Read. Note that the only data-in pairs that are registered prior to the tWTR period are written to the internal array, and
any subsequent data-in must be masked with DM.
46
Notes:
DI b = Data in for column b
3 subsequent elements of Data IN are applied in the programmed order following Di b
A non--interrupted burst of 4 is shown
AP is LOW with the WRITE command (AUTO PRECHARGE disabled)
Write Burst (min. and max. tDQSS)
Integrated Silicon Solution, Inc.
Rev. 00D
06/22/09

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