IS43R32400D-5BL ISSI, Integrated Silicon Solution Inc, IS43R32400D-5BL Datasheet - Page 31

• Manufacturer Part Number: IS43R32400D-5BL
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: DDR SDRAMr

Specifications of IS43R32400D-5BL

• Organization: 4Mx32
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 700ps
• Maximum Clock Rate: 200MHz
• Operating Supply Voltage (typ): 2.6V
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Supply Current: 185mA
• Pin Count: 144
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

NOTE:
1. This table applies when CKEn--1 was HIGH and CKEn is HIGH (see Truth Table 2) and after tXSNR or tXSRD has been met
2. This table is bank--specific, except where noted, i.e., the current state is for a specific bank and the commands shown are
3. Current state definitions:
Write: A WRITE burst has been initiated, with AUTO PRECHARGE disabled, and has not yet terminated or been terminated.
4. The following states must not be interrupted by a command issued to the same bank. DESELECT or NOP commands, or
5. The following states must not be interrupted by any executable command; DESELECT or NOP commands must be applied on
6. All states and sequences not shown are illegal or reserved.
7. Not bank--specific; requires that all banks are idle and no bursts are in progress.
8. May or may not be bank--specific; if multiple banks are to be precharged, each must be in a valid state for precharging.
9. Not bank--specific; BURST TERMINATE affects the most recent READ burst, regardless of bank.
10. Reads or Writes listed in the Command/Action column include Reads or Writes with AUTO PRECHARGE enabled and
11. Requires appropriate DM masking.
12. A WRITE command may be applied after the completion of the READ burst; otherwise, a Burst Terminate must be used to
13. Operation or timing that is not specified is illegal and after such an event, in order to guarantee proper operation, the DRAM
IS43R32400D, IS43R16800D
TRUTH TABLE - Current State Bank n -- Command to Bank n
Integrated Silicon Solution, Inc.
Rev. 00D
06/22/09
(if the previous state was self refresh).
those allowed to be issued to that bank when in that state. Exceptions are covered in the notes below.
Idle: The bank has been precharged, and tRP has been met.
Row Active: A row in the bank has been activated, and tRCD has been met. No data bursts/accesses and no register ac-
cesses are in progress.
Read: A READ burst has been initiated, with AUTO PRECHARGE disabled, and has not yet terminated or been terminated.
allowable commands to the other bank should be issued on any clock edge occurring during these states. Allowable com-
mands to the other bank are determined by its current state and Truth Table 3, and according to Truth Table 4.
Precharging: Starts with registration of a PRECHARGE command and ends when tRP is met. Once tRP is met, the bank
will be in the idle state.
Row Activating: Starts with registration of an ACTIVE command and ends when tRCD is met. Once tRCD is met, the bank
will be in the ”row active” state.
Read w/Auto-Precharge Enabled: Starts with registration of a READ command with AUTO PRECHARGE enabled and ends
when tRP has been met. Once tRP is met, the bank will be in the idle state.
Write w/Auto-Precharge Enabled: Starts with registration of a WRITE command with AUTO PRECHARGE enabled and ends
when tRP has been met. Once tRP is met, the bank will be in the idle state.
each positive clock edge during these states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when tRC is met. Once tRFC is met, the DDR
SDRAM will be in the ”all banks idle” state.
Accessing Mode Register: Starts with registration of a MODE REGISTER SET command and ends when tMRD has been
met. Once tMRD is met, the DDR SDRAM will be in the ”all banks idle” state.
Precharging All: Starts with registration of a PRECHARGE ALL command and ends when tRP is met. Once tRP is met, all
banks will be in the idle state.
Reads or Writes with AUTO PRECHARGE disabled.
end the READ prior to asserting a WRITE command,
must be powered down and then restarted through the specified initialization sequence before normal operation can continue.
Read (Auto-
Write (Auto-
Row Active
CURRENT
Precharge
Precharge
Disabled)
Disabled)
STATE
Any
Idle
CS
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS
H
H
H
H
H
X
H
H
H
L
L
L
L
L
L
CAS
X
H
H
H
H
H
H
L
L
L
L
L
L
L
L
WE
X
H
H
H
H
H
H
L
L
L
L
L
L
L
L
COMMAND/ACTION
DESELECT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
ACTIVE (select and activate row)
AUTO REFRESH
MODE REGISTER SET
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE (deactivate row in bank or banks)
READ (select column and start new READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE (truncate READ burst, start precharge)
BURST TERMINATE
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE (truncate WRITE burst, start precharge)
NOTES
7
7
10
10
8
10
10, 12
8
9
10, 11
10
8, 11
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