USB3320C-EZK Standard Microsystems (SMSC), USB3320C-EZK Datasheet - Page 61

• Manufacturer Part Number: USB3320C-EZK
• Description: USB PHY
• Manufacturer: Standard Microsystems (SMSC)

Specifications of USB3320C-EZK

• Lead Free Status / RoHS Status: Compliant

Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
Datasheet
Chapter 7 ULPI Register Map
SMSC USB3320
7.1
REGISTER NAME
Vendor ID Low
Vendor ID High
Product ID Low
Product ID High
Function Control
Interface Control
OTG Control
USB Interrupt Enable Rising
USB Interrupt Enable Falling
USB Interrupt Status (Note
USB Interrupt Latch
Debug
Scratch Register
Carkit Control
Reserved
Carkit Interrupt Enable
Carkit Interrupt Status
Carkit Interrupt Latch
Reserved
HS TX Boost
Reserved
Headset Audio Mode
The USB3320 Transceiver implements all of the ULPI registers detailed in the ULPI revision 1.1
specification. The complete USB3320 ULPI register set is shown in
This table also includes the default state of each register upon POR or de-assertion of RESETB, as
described in
the ULPI register array. The Link should not read or write to any registers not listed in this table.
The USB3320 supports extended register access. The immediate register set (00-3Fh) can be
accessed through either a immediate address or an extended register address.
ULPI Register Array
Section
7.1)
5.5.2. The RESET bit in the
Table 7.1 ULPI Register Map
DATASHEET
DEFAULT
STATE
1Fh
1Fh
24h
04h
07h
00h
41h
00h
06h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
61
Function Control
0A-0Ch
0D-0Fh
1D-1Fh
19-1Bh
04-06h
07-09h
10-12h
16-18h
READ
00h
01h
02h
03h
13h
14h
15h
20h
21h
31h
32h
33h
WRITE
ADDRESS (6BIT)
0Ah
0Dh
1Dh
04h
07h
10h
16h
19h
31h
32h
33h
Register does not reset the bits of
-
-
-
-
-
-
-
-
-
Table
22-30h
1Ch
7.1. All registers are 8 bits.
SET
0Bh
0Eh
1Ah
1Eh
05h
08h
17h
11h
Revision 1.0 (07-14-09)
-
-
-
-
-
-
-
-
-
-
-
-
CLEAR
0Ch
06h
09h
0Fh
12h
18h
1Bh
1Fh
-
-
-
-
-
-
-
-
-
-
-
-