USB3320C-EZK Standard Microsystems (SMSC), USB3320C-EZK Datasheet - Page 46

• Manufacturer Part Number: USB3320C-EZK
• Description: USB PHY
• Manufacturer: Standard Microsystems (SMSC)

Specifications of USB3320C-EZK

• Lead Free Status / RoHS Status: Compliant

Revision 1.0 (07-14-09)
ULPI Register
DATA[7:0]
NXT
CLK
STP
DIR
register data. At T4, the transceiver will accept the register data and drive NXT low. The Link will drive
an Idle on the bus and drive STP high to signal the end of the data packet. Finally, at T5, the
transceiver will latch the data into the register and the Link will pull STP low.
NXT is used to control when the Link drives the register data on the bus. DIR is low throughout this
transaction since the transceiver is receiving data from the Link. STP is used to end the transaction
and data is registered after the de-assertion of STP. After the write operation completes, the Link must
drive a ULPI Idle (00h) on the data bus or the USB3320 may decode the bus value as a ULPI
command.
A ULPI extended register write operation is shown in
will wait until DIR is low, and at T0, drive the TXD CMD on the data bus. At T2 the transceiver will
drive NXT high. On the next clock T3 the Link will drive the extended address. On the next rising clock
edge, T4, the Link will write the register data. At T5, the transceiver will accept the register data and
drive NXT low. The Link will drive an Idle on the bus and drive STP high to signal the end of the data
packet. Finally, at T5, the transceiver will latch the data into the register. The Link will pull STP low.
Idle
Figure 6.4 ULPI Extended Register Write in Synchronous Mode
T0
(extended reg write)
T1
TXD CMD
DATASHEET
Reg Data [n-1]
T2
46
T3
Extended
address
Figure
Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
6.4. To write an extended register, the Link
T4
Reg Data[n]
T5
Idle
T6
Reg Data [n]
SMSC USB3320
Datasheet
T7