USB3320C-EZK Standard Microsystems (SMSC), USB3320C-EZK Datasheet - Page 16

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USB3320C-EZK

Manufacturer Part Number
USB3320C-EZK
Description
USB PHY
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of USB3320C-EZK

Lead Free Status / RoHS Status
Compliant

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Revision 1.0 (07-14-09)
4.2
4.3
Suspend Recovery Time
Note 4.3
PHY Preparation Time
CLKOUT Duty Cycle
REFCLK Duty Cycle
REFCLK Frequency Accuracy
60MHz ULPI Output Clock
Setup time (STP, data in)
Hold time (STP, data in)
Output delay (control out, 8-bit data out)
60MHz ULPI Input Clock
Setup time (STP, data in)
Hold time (STP, data in)
Output delay (control out, 8-bit data out)
PARAMETER
Note 4.3
Note: The USB3320 uses the AutoResume feature,
Note: V
Note 4.4
Clock Specifications
ULPI Interface Timing
PARAMETER
less than 1ms
DD18
The Suspend Recovery Time is measured from the start of the REFCLK to when the
USB3320 de-asserts DIR.
REFCLK does not need to be aligned in any way to the ULPI signals.
= 1.6 to 2.0V; V
Note 4.4
T
T
DC
DC
F
SYMBOL
START
PREP
REFCLK
CLKOUT
REFCLK
Table 4.2 ULPI Clock Specifications
Table 4.3 ULPI Interface Timing
SS
SYMBOL
T
T
T
T
T
T
HC
DC
HC
DC
SC
SC
= 0V; T
26MHz REFCLK
12MHz REFCLK
52MHz REFCLK
24MHz REFCLK
19.2MHz REFCLK
27MHz REFCLK
38.4MHz REFCLK
13MHz REFCLK
60MHz REFCLK
ULPI Input Clock Mode
ULPI Input Clock Mode
DATASHEET
, T
, T
, T
, T
, T
, T
SD
HD
DD
SD
HD
DD
CONDITIONS
A
16
= -40°C to +85°C
Model-specific REFCLK
Model-specific REFCLK
Model-specific REFCLK
60MHz REFCLK
60MHz REFCLK
60Mhz REFCLK
CONDITIONS
Section
Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
6.2.4.4, to allow a host start-up time of
-500
MIN
0.4
45
20
TYP
1.03
2.24
0.52
1.12
1.40
1.00
0.70
2.07
0.45
MIN
-0.5
5.0
0.0
1.0
1.5
1.5
MAX
+500
2.28
3.49
1.77
2.37
2.65
2.25
1.95
3.32
MAX
0.5
55
80
3.5
6.0
SMSC USB3320
Datasheet
ms
ms
ms
ms
ms
ms
ms
ms
ms
%
%
PPM
UNITS
UNITS
ns
ns
ns
ns
ns
ns

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