AM79C973BKD AMD (ADVANCED MICRO DEVICES), AM79C973BKD Datasheet - Page 177

• Manufacturer Part Number: AM79C973BKD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKD

• Lead Free Status / RoHS Status: Compliant

12-5
4
1
RST Pin
High
High
High
Low
RES
EEN
ESK
Read in Progress
PREAD or Auto
EESK/LED1/SFBD pin at the end
of H_RESET. This value indi-
cates whether or not an EE-
PROM is present at the EEPROM
interface. If this bit is a 1, it indi-
cates
present. If this bit is a 0, it indi-
cates that an EEPROM is not
present.
Reserved locations. Written as
zeros; read as undefined.
EEPROM Port Enable. When this
bit is set to a 1, it causes the val-
ues of ECS, ESK, and EDI to be
driven onto the EECS, EESK,
and EEDI pins, respectively. If
EEN = 0 and no EEPROM read
function is currently active, then
EECS will be driven LOW. When
EEN = 0 and no EEPROM read
function is currently active, EESK
and EEDI pins will be driven by
the LED registers BCR5 and
BCR4, respectively. See Table
32.
EEPROM Serial Clock. This bit
and the EDI/EDO bit are used to
control host access to the EE-
PROM. Values programmed to
this bit are placed onto the EESK
pin at the rising edge of the next
Read accessible only. EEDET is
read only; write operations have
no effect. The value of this bit is
determined at the end of the
H_RESET operation. It is unaf-
fected by S_RESET or the STOP
bit.
Table 32 indicates the possible
combinations of EEDET and the
existence of an EEPROM and the
resulting operations that are pos-
sible on the EEPROM interface.
X
1
0
0
that
an
Table 32. Interface Pin Assignment
EEPROM
EEN
X
X
1
0
P R E L I M I N A R Y
Am79C973/Am79C975
is
Bit of BCR19
From ECS
3
2
EECS
Active
0
0
RES
ECS
From ESK Bit of
Tri-State
BCR19
EESK
Active
Read accessible always, write
accessible only when either the
STOP or the SPND bit is set.
EEN is set to 0 by H_RESET and
is unaffected by the S_RESET or
STOP bit.
Reserved location. Written as
zero and read as undefined.
EEPROM Chip Select. This bit is
used to control the value of the
EECS pin of the interface when
the EEN bit is set to 1 and the
PREAD bit is set to 0. If EEN = 1
and PREAD = 0 and ECS is set to
a 1, then the EECS pin will be
forced to a HIGH level at the ris-
ing edge of the next clock follow-
ing bit programming.
If EEN = 1 and PREAD = 0 and
ECS is set to a 0, then the EECS
pin will be forced to a LOW level
at the rising edge of the next
clock following bit programming.
ECS has no effect on the output
value of the EECS pin unless the
PREAD bit is set to 0 and the
EEN bit is set to 1.
Read accessible always, write
accessible only when either the
STOP or the SPND bit is set.
ECS is set to 0 by H_RESET and
is not affected by S_RESET or
STOP.
LED1
clock following bit programming,
except when the PREAD bit is set
to 1 or the EEN bit is set to 0. If
both the ESK bit and the EDI/
EDO bit values are changed dur-
ing one BCR19 write operation,
From EEDI Bit of
Tri-State
BCR19
Active
LED0
EEDI
177