PIC18F65K22-E/PT Microchip Technology, PIC18F65K22-E/PT Datasheet - Page 216

• Manufacturer Part Number: PIC18F65K22-E/PT
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, GP 64 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K22-E/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
16.3
Timer3/5/7 can be configured for 16-bit reads and
writes (see
(TxCON<1>) is set, the address for TMRxH is mapped
to a buffer register for the high byte of Timer3/5/7. A
read from TMRxL will load the contents of the high byte
of Timer3/5/7 into the Timerx High Byte Buffer register.
This provides users with the ability to accurately read
all 16 bits of Timer3/5/7 without having to determine
whether a read of the high byte, followed by a read of
the low byte, has become invalid due to a rollover
between reads.
A write to the high byte of Timer3/5/7 must also take
place through the TMRxH Buffer register. The Timer3/
5/7 high byte is updated with the contents of TMRxH
when a write occurs to TMRxL. This allows users to
write all 16 bits to both the high and low bytes of
Timer3/5/7 at once.
The high byte of Timer3/5/7 is not directly readable or
writable in this mode. All reads and writes must take
place through the Timerx High Byte Buffer register.
Writes to TMRxH do not clear the Timer3/5/7 prescaler.
The prescaler is only cleared on writes to TMRxL.
DS39960D-page 216
Timer3/5/7 16-Bit Read/Write Mode
Figure
16.3). When the RD16 control bit
16.4
The SOSC internal oscillator may be used as the clock
source for Timer3/5/7. The SOSC oscillator is enabled
by any peripheral that requests it. There are eight ways
the SOSC can be enabled: if the SOSC is selected as
the source by any of the odd timers, which is done by
each respective SOSCEN bit (TxCON<3>), if the
SOSC is selected as the RTCC source by the RTCOSC
Configuration bit (CONFIG3L<1>), if the SOSC is
selected as the CPU clock source by the SCS bits
(OSCCON<1:0>) or if the SOSCGO bit is set
(OSCCON2<3>). The SOSCGO bit is used to warm up
the SOSC so that it is ready before any peripheral
requests it. To use it as the Timer3/5/7 clock source, the
TMRxCS bit must also be set. As previously noted, this
also configures Timer3/5/7 to increment on every rising
edge of the oscillator source.
The SOSC oscillator is described in
“SOSC
Oscillator”.
Using the SOSC Oscillator as the
Timer3/5/7 Clock Source
 2009-2011 Microchip Technology Inc.
Section 14.5