PIC18F65K22-E/PT Microchip Technology, PIC18F65K22-E/PT Datasheet - Page 111

no-image

PIC18F65K22-E/PT

Manufacturer Part Number
PIC18F65K22-E/PT
Description
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, GP 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F65K22-E/PT

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F65K22-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
7.0
The Flash program memory is readable, writable and
erasable during normal operation over the entire V
range.
A read from program memory is executed on one byte
at a time. For execution of a write to, or erasure of,
program memory:
• Memory of 32 Kbytes and 64 Kbytes
• Memory of 128 Kbytes (PIC18FX7K22 devices) –
Writing or erasing program memory will cease
instruction fetches until the operation is complete. The
program memory cannot be accessed during the write
or erase, therefore, code cannot execute. An internal
programming timer terminates program memory writes
and erases.
A value written to program memory does not need to be
a valid instruction. Executing a program memory
location that forms an invalid instruction results in a
NOP.
FIGURE 7-1:
 2009-2011 Microchip Technology Inc.
(PIC18FX5K22 and PIC18FX6K22 devices) –
Blocks of 64 bytes
Blocks of 128 bytes
Note 1: The Table Pointer register points to a byte in program memory.
TBLPTRU
FLASH PROGRAM MEMORY
Table Pointer
TBLPTRH
TABLE READ OPERATION
(1)
TBLPTRL
Program Memory
(TBLPTR)
DD
Instruction:
Program Memory
PIC18F87K22 FAMILY
7.1
In order to read and write program memory, there are
two operations that allow the processor to move bytes
between the program memory space and the data RAM:
• Table Read (TBLRD)
• Table Write (TBLWT)
The program memory space is 16 bits wide, while the
data RAM space is 8 bits wide. Table reads and table
writes move data between these two memory spaces
through an 8-bit register (TABLAT).
Table read operations retrieve data from program
memory and place it into the data RAM space.
Figure 7-1
program memory and data RAM.
Table write operations store data from the data memory
space into holding registers in program memory. The
procedure to write the contents of the holding registers
into program memory is detailed in
to Flash Program
operation of a table write with program memory and data
RAM.
Table operations work with byte entities. A table block
containing data, rather than program instructions, is not
required to be word-aligned. Therefore, a table block can
start and end at any byte address. If a table write is being
used to write executable code into program memory,
program instructions will need to be word-aligned.
TBLRD
Table Reads and Table Writes
*
shows the operation of a table read with
Memory”.
Table Latch (8-bit)
Figure 7-2
Section 7.5 “Writing
DS39960D-page 111
TABLAT
shows the

Related parts for PIC18F65K22-E/PT